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From: Rhyland Klein <rklein@nvidia.com>
To: Peter De Schrijver <pdeschrijver@nvidia.com>,
	Thierry Reding <thierry.reding@gmail.com>
Cc: Mike Turquette <mturquette@linaro.org>,
	Stephen Warren <swarren@wwwdotorg.org>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Alexandre Courbot <gnurou@gmail.com>,
	Bill Huang <bilhuang@nvidia.com>, Jim Lin <jilin@nvidia.com>,
	Benson Leung <bleung@chromium.org>,
	linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org, Rhyland Klein <rklein@nvidia.com>
Subject: [PATCH v6 02/25] clk: tegra: Modify tegra_audio_clk_init to accept more plls
Date: Thu, 18 Jun 2015 17:28:17 -0400	[thread overview]
Message-ID: <1434662920-21469-3-git-send-email-rklein@nvidia.com> (raw)
In-Reply-To: <1434662920-21469-1-git-send-email-rklein@nvidia.com>

tegra_audio_clk_init was written expecting a single PLL to be
passed in directly. Change this to accept an array which will
allow for supporting multiple plls and specifying specific data
about them, like their parent, which may change over time.

Reviewed-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
---
v5:
  - changed num_plls to unsigned int from int
  - Changed calls to tegra_audio_clk_init to using ARRAY_SIZE
  - Fixed incorrect type passed for T114 and T30

 drivers/clk/tegra/clk-tegra-audio.c |   25 ++++++++++++++++++-------
 drivers/clk/tegra/clk-tegra114.c    |    8 +++++++-
 drivers/clk/tegra/clk-tegra124.c    |    8 +++++++-
 drivers/clk/tegra/clk-tegra30.c     |    8 +++++++-
 drivers/clk/tegra/clk.h             |   18 +++++++++++++++++-
 5 files changed, 56 insertions(+), 11 deletions(-)

diff --git a/drivers/clk/tegra/clk-tegra-audio.c b/drivers/clk/tegra/clk-tegra-audio.c
index 5c38aab2c5b8..b39874e89502 100644
--- a/drivers/clk/tegra/clk-tegra-audio.c
+++ b/drivers/clk/tegra/clk-tegra-audio.c
@@ -126,18 +126,29 @@ static struct tegra_audio2x_clk_initdata audio2x_clks[] = {
 
 void __init tegra_audio_clk_init(void __iomem *clk_base,
 			void __iomem *pmc_base, struct tegra_clk *tegra_clks,
-			struct tegra_clk_pll_params *pll_a_params)
+			struct tegra_audio_clk_info *audio_info,
+			unsigned int num_plls)
 {
 	struct clk *clk;
 	struct clk **dt_clk;
 	int i;
 
-	/* PLLA */
-	dt_clk = tegra_lookup_dt_id(tegra_clk_pll_a, tegra_clks);
-	if (dt_clk) {
-		clk = tegra_clk_register_pll("pll_a", "pll_p_out1", clk_base,
-				pmc_base, 0, pll_a_params, NULL);
-		*dt_clk = clk;
+	if (!audio_info || num_plls < 1) {
+		pr_err("No audio data passed to tegra_audio_clk_init\n");
+		WARN_ON(1);
+		return;
+	}
+
+	for (i = 0; i < num_plls; i++) {
+		struct tegra_audio_clk_info *info = &audio_info[i];
+
+		dt_clk = tegra_lookup_dt_id(info->clk_id, tegra_clks);
+		if (dt_clk) {
+			clk = tegra_clk_register_pll(info->name, info->parent,
+					clk_base, pmc_base, 0, info->pll_params,
+					NULL);
+			*dt_clk = clk;
+		}
 	}
 
 	/* PLLA_OUT0 */
diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
index 8237d16b4075..d8586bd6afce 100644
--- a/drivers/clk/tegra/clk-tegra114.c
+++ b/drivers/clk/tegra/clk-tegra114.c
@@ -935,6 +935,10 @@ static u32 mux_pllm_pllc2_c_c3_pllp_plla_idx[] = {
 	[0] = 0, [1] = 1, [2] = 2, [3] = 3, [4] = 4, [5] = 6,
 };
 
+static struct tegra_audio_clk_info tegra114_audio_plls[] = {
+	{ "pll_a", &pll_a_params, tegra_clk_pll_a, "pll_p_out1" },
+};
+
 static struct clk **clks;
 
 static unsigned long osc_freq;
@@ -1483,7 +1487,9 @@ static void __init tegra114_clock_init(struct device_node *np)
 	tegra114_fixed_clk_init(clk_base);
 	tegra114_pll_init(clk_base, pmc_base);
 	tegra114_periph_clk_init(clk_base, pmc_base);
-	tegra_audio_clk_init(clk_base, pmc_base, tegra114_clks, &pll_a_params);
+	tegra_audio_clk_init(clk_base, pmc_base, tegra114_clks,
+			     tegra114_audio_plls,
+			     ARRAY_SIZE(tegra114_audio_plls));
 	tegra_pmc_clk_init(pmc_base, tegra114_clks);
 	tegra_super_clk_gen4_init(clk_base, pmc_base, tegra114_clks,
 					&pll_x_params);
diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
index a4886741e293..bd8205d23a33 100644
--- a/drivers/clk/tegra/clk-tegra124.c
+++ b/drivers/clk/tegra/clk-tegra124.c
@@ -1418,6 +1418,10 @@ static struct tegra_clk_init_table tegra132_init_table[] __initdata = {
 	{TEGRA124_CLK_CLK_MAX, TEGRA124_CLK_CLK_MAX, 0, 0},
 };
 
+static struct tegra_audio_clk_info tegra124_audio_plls[] = {
+	{ "pll_a", &pll_a_params, tegra_clk_pll_a, "pll_p_out1" },
+};
+
 /**
  * tegra124_clock_apply_init_table - initialize clocks on Tegra124 SoCs
  *
@@ -1556,7 +1560,9 @@ static void __init tegra124_132_clock_init_pre(struct device_node *np)
 	tegra_fixed_clk_init(tegra124_clks);
 	tegra124_pll_init(clk_base, pmc_base);
 	tegra124_periph_clk_init(clk_base, pmc_base);
-	tegra_audio_clk_init(clk_base, pmc_base, tegra124_clks, &pll_a_params);
+	tegra_audio_clk_init(clk_base, pmc_base, tegra124_clks,
+			     tegra124_audio_plls,
+			     ARRAY_SIZE(tegra124_audio_plls));
 	tegra_pmc_clk_init(pmc_base, tegra124_clks);
 
 	/* For Tegra124 & Tegra132, PLLD is the only source for DSIA & DSIB */
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
index 0af3e834dd24..8d1d569320b7 100644
--- a/drivers/clk/tegra/clk-tegra30.c
+++ b/drivers/clk/tegra/clk-tegra30.c
@@ -1406,6 +1406,10 @@ static const struct of_device_id pmc_match[] __initconst = {
 	{},
 };
 
+static struct tegra_audio_clk_info tegra30_audio_plls[] = {
+	{ "pll_a", &pll_a_params, tegra_clk_pll_a, "pll_p_out1" },
+};
+
 static void __init tegra30_clock_init(struct device_node *np)
 {
 	struct device_node *node;
@@ -1443,7 +1447,9 @@ static void __init tegra30_clock_init(struct device_node *np)
 	tegra30_pll_init();
 	tegra30_super_clk_init();
 	tegra30_periph_clk_init();
-	tegra_audio_clk_init(clk_base, pmc_base, tegra30_clks, &pll_a_params);
+	tegra_audio_clk_init(clk_base, pmc_base, tegra30_clks,
+			     tegra30_audio_plls,
+			     ARRAY_SIZE(tegra30_audio_plls));
 	tegra_pmc_clk_init(pmc_base, tegra30_clks);
 
 	tegra_init_dup_clks(tegra_clk_duplicates, clks, TEGRA30_CLK_CLK_MAX);
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index bdc661cb81f0..5d2678914160 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -270,6 +270,21 @@ struct tegra_clk_pll {
 
 #define to_clk_pll(_hw) container_of(_hw, struct tegra_clk_pll, hw)
 
+/**
+ * struct tegra_audio_clk_info - Tegra Audio Clk Information
+ *
+ * @name:	name for the audio pll
+ * @pll_params:	pll_params for audio pll
+ * @clk_id:	clk_ids for the audio pll
+ * @parent:	name of the parent of the audio pll
+ */
+struct tegra_audio_clk_info {
+	char *name;
+	struct tegra_clk_pll_params *pll_params;
+	int clk_id;
+	char *parent;
+};
+
 extern const struct clk_ops tegra_clk_pll_ops;
 extern const struct clk_ops tegra_clk_plle_ops;
 struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,
@@ -622,7 +637,8 @@ void tegra_register_devclks(struct tegra_devclk *dev_clks, int num);
 
 void tegra_audio_clk_init(void __iomem *clk_base,
 			void __iomem *pmc_base, struct tegra_clk *tegra_clks,
-			struct tegra_clk_pll_params *pll_params);
+			struct tegra_audio_clk_info *audio_info,
+			unsigned int num_plls);
 
 void tegra_periph_clk_init(void __iomem *clk_base, void __iomem *pmc_base,
 			struct tegra_clk *tegra_clks,
-- 
1.7.9.5


  parent reply	other threads:[~2015-06-18 21:30 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-18 21:28 [PATCH v6 00/25] Tegra210 Clock Support Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 01/25] clk: tegra: Update struct tegra_clk_pll_params kerneldoc Rhyland Klein
2015-06-18 21:28 ` Rhyland Klein [this message]
2015-06-18 21:28 ` [PATCH v6 03/25] clk: tegra: periph: add new periph clks and muxes for Tegra210 Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 04/25] clk: tegra: pll: add tegra_pll_wait_for_lock to clk header Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 05/25] clk: tegra: pll: simplify clk_enable_path Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 06/25] clk: tegra: pll: update warning msg Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 07/25] clk: tegra: pll-params: change misc_reg count from 3 -> 6 Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 08/25] clk: tegra: pll: Don't unconditionally set LOCK flags Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 09/25] clk: tegra: pll: Add logic for handling SDM data Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 10/25] clk: tegra: pll: Add logic for out-of-table rates for T210 Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 11/25] clk: tegra: pll: Add code to handle if resets are supported by PLL Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 12/25] clk: tegra: Update PLLM handling Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 13/25] clk: tegra: pll: Add specialized logic for T210 Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 14/25] clk: tegra: pll: Add support for PLLMB " Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 15/25] clk: tegra: pll: Adjust vco_min if SDM present Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 16/25] clk: tegra: pll: Add Set_default logic Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 17/25] clk: tegra: pll: Add dyn_ramp callback Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 18/25] clk: tegra: pll: Add logic for SS Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 19/25] clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 20/25] clk: tegra: Add Super Gen5 Logic Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 21/25] clk: tegra210: add support for Tegra210 clocks Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 22/25] clk: tegra: pll: Fix issues with rates for VCO PLLs Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 23/25] clk: tegra: fix WARN_ON in PLL_RE registration Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 24/25] clk: tegra: read correct iddq register in PLL_SS registration Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 25/25] clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs Rhyland Klein

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