From: Rhyland Klein <rklein@nvidia.com>
To: Peter De Schrijver <pdeschrijver@nvidia.com>,
Thierry Reding <thierry.reding@gmail.com>
Cc: Mike Turquette <mturquette@linaro.org>,
Stephen Warren <swarren@wwwdotorg.org>,
Stephen Boyd <sboyd@codeaurora.org>,
Alexandre Courbot <gnurou@gmail.com>,
Bill Huang <bilhuang@nvidia.com>, Jim Lin <jilin@nvidia.com>,
Benson Leung <bleung@chromium.org>,
linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org, Rhyland Klein <rklein@nvidia.com>
Subject: [PATCH v6 04/25] clk: tegra: pll: add tegra_pll_wait_for_lock to clk header
Date: Thu, 18 Jun 2015 17:28:19 -0400 [thread overview]
Message-ID: <1434662920-21469-5-git-send-email-rklein@nvidia.com> (raw)
In-Reply-To: <1434662920-21469-1-git-send-email-rklein@nvidia.com>
Create a wrapper interface to make use of the existing
clk_pll_wait_for_lock. This will be useful for implementations
of callbacks in Tegra SoC specific clock drivers.
Reviewed-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
---
drivers/clk/tegra/clk-pll.c | 5 +++++
drivers/clk/tegra/clk.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index 05c6d08a6695..b9a739ce4b98 100644
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -269,6 +269,11 @@ static int clk_pll_wait_for_lock(struct tegra_clk_pll *pll)
return -1;
}
+int tegra_pll_wait_for_lock(struct tegra_clk_pll *pll)
+{
+ return clk_pll_wait_for_lock(pll);
+}
+
static int clk_pll_is_enabled(struct clk_hw *hw)
{
struct tegra_clk_pll *pll = to_clk_pll(hw);
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index 5d2678914160..eeb735e3fa72 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -674,5 +674,6 @@ void tegra114_clock_deassert_dfll_dvco_reset(void);
typedef void (*tegra_clk_apply_init_table_func)(void);
extern tegra_clk_apply_init_table_func tegra_clk_apply_init_table;
+int tegra_pll_wait_for_lock(struct tegra_clk_pll *pll);
#endif /* TEGRA_CLK_H */
--
1.7.9.5
next prev parent reply other threads:[~2015-06-18 21:35 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-18 21:28 [PATCH v6 00/25] Tegra210 Clock Support Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 01/25] clk: tegra: Update struct tegra_clk_pll_params kerneldoc Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 02/25] clk: tegra: Modify tegra_audio_clk_init to accept more plls Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 03/25] clk: tegra: periph: add new periph clks and muxes for Tegra210 Rhyland Klein
2015-06-18 21:28 ` Rhyland Klein [this message]
2015-06-18 21:28 ` [PATCH v6 05/25] clk: tegra: pll: simplify clk_enable_path Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 06/25] clk: tegra: pll: update warning msg Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 07/25] clk: tegra: pll-params: change misc_reg count from 3 -> 6 Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 08/25] clk: tegra: pll: Don't unconditionally set LOCK flags Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 09/25] clk: tegra: pll: Add logic for handling SDM data Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 10/25] clk: tegra: pll: Add logic for out-of-table rates for T210 Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 11/25] clk: tegra: pll: Add code to handle if resets are supported by PLL Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 12/25] clk: tegra: Update PLLM handling Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 13/25] clk: tegra: pll: Add specialized logic for T210 Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 14/25] clk: tegra: pll: Add support for PLLMB " Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 15/25] clk: tegra: pll: Adjust vco_min if SDM present Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 16/25] clk: tegra: pll: Add Set_default logic Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 17/25] clk: tegra: pll: Add dyn_ramp callback Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 18/25] clk: tegra: pll: Add logic for SS Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 19/25] clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 20/25] clk: tegra: Add Super Gen5 Logic Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 21/25] clk: tegra210: add support for Tegra210 clocks Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 22/25] clk: tegra: pll: Fix issues with rates for VCO PLLs Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 23/25] clk: tegra: fix WARN_ON in PLL_RE registration Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 24/25] clk: tegra: read correct iddq register in PLL_SS registration Rhyland Klein
2015-06-18 21:28 ` [PATCH v6 25/25] clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs Rhyland Klein
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