From: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
To: <bp@alien8.de>, <tony.luck@intel.com>, <hpa@zytor.com>,
<mingo@redhat.com>, <tglx@linutronix.de>,
<dougthompson@xmission.com>, <mchehab@osg.samsung.com>
Cc: <x86@kernel.org>, <linux-edac@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <ashok.raj@intel.com>,
<gong.chen@linux.intel.com>, <len.brown@intel.com>,
<peterz@infradead.org>, <ak@linux.intel.com>,
<alexander.shishkin@linux.intel.com>
Subject: [PATCH V2 4/5] x86/mce: Clarify comments regarding deferred error
Date: Mon, 29 Feb 2016 16:32:58 -0600 [thread overview]
Message-ID: <1456785179-14378-5-git-send-email-Aravind.Gopalakrishnan@amd.com> (raw)
In-Reply-To: <1456785179-14378-1-git-send-email-Aravind.Gopalakrishnan@amd.com>
The Deferred field indicates if we have a Deferred error.
Deferred errors indicate errors that hardware could not
fix. But it still does not cause any interruption to program
flow. So it does not generate any #MC and UC bit in MCx_STATUS
is not set.
Fixing comment here. No functional change
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
---
arch/x86/include/asm/mce.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 69f8bda..3b45e36 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -40,7 +40,7 @@
#define MCI_STATUS_AR (1ULL<<55) /* Action required */
/* AMD-specific bits */
-#define MCI_STATUS_DEFERRED (1ULL<<44) /* declare an uncorrected error */
+#define MCI_STATUS_DEFERRED (1ULL<<44) /* uncorrected error, deferred exception */
#define MCI_STATUS_POISON (1ULL<<43) /* access poisonous data */
#define MCI_STATUS_TCC (1ULL<<55) /* Task context corrupt */
--
2.7.0
next prev parent reply other threads:[~2016-02-29 22:18 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-29 22:32 [PATCH V2 0/5] Updates to EDAC and AMD MCE driver Aravind Gopalakrishnan
2016-02-29 22:32 ` [PATCH V2 1/5] x86/mce: Move MCx_CONFIG MSR definition Aravind Gopalakrishnan
2016-03-08 13:12 ` [tip:ras/core] x86/mce: Move MCx_CONFIG MSR definitions tip-bot for Aravind Gopalakrishnan
2016-02-29 22:32 ` [PATCH V2 2/5] EDAC, MCE, AMD: Enable error decoding of Scalable MCA errors Aravind Gopalakrishnan
2016-03-02 10:50 ` Borislav Petkov
2016-03-02 10:52 ` [PATCH 1/3] x86/mce/AMD, EDAC: " Borislav Petkov
2016-03-02 10:53 ` [PATCH 2/3] x86/mce/AMD, EDAC: Simplify SMCA decoding Borislav Petkov
2016-03-02 15:52 ` Aravind Gopalakrishnan
2016-03-02 16:21 ` Borislav Petkov
2016-03-02 16:27 ` Aravind Gopalakrishnan
2016-03-02 16:38 ` Borislav Petkov
2016-03-02 16:54 ` Aravind Gopalakrishnan
2016-03-02 10:54 ` [PATCH 3/3] EDAC, mce_amd: Correct error paths Borislav Petkov
2016-03-02 15:56 ` Aravind Gopalakrishnan
2016-03-02 15:57 ` [PATCH V2 2/5] EDAC, MCE, AMD: Enable error decoding of Scalable MCA errors Aravind Gopalakrishnan
2016-02-29 22:32 ` [PATCH V2 3/5] x86/mce/AMD: Fix logic to obtain block address Aravind Gopalakrishnan
2016-02-29 22:32 ` Aravind Gopalakrishnan [this message]
2016-02-29 22:32 ` [PATCH V2 5/5] x86/mce/AMD: Add comments for easier understanding Aravind Gopalakrishnan
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