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From: Tomasz Nowicki <tn@semihalf.com>
To: helgaas@kernel.org, will.deacon@arm.com, catalin.marinas@arm.com,
	rafael@kernel.org, Lorenzo.Pieralisi@arm.com
Cc: arnd@arndb.de, hanjun.guo@linaro.org, okaya@codeaurora.org,
	jchandra@broadcom.com, cov@codeaurora.org, dhdang@apm.com,
	ard.biesheuvel@linaro.org, robert.richter@caviumnetworks.com,
	mw@semihalf.com, Liviu.Dudau@arm.com, ddaney@caviumnetworks.com,
	wangyijing@huawei.com, msalter@redhat.com,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linaro-acpi@lists.linaro.org, jcm@redhat.com,
	andrea.gallo@linaro.org, jeremy.linton@arm.com,
	liudongdong3@huawei.com, gabriele.paoloni@huawei.com,
	jhugo@codeaurora.org, linux-acpi@vger.kernel.org,
	linux-kernel@vger.kernel.org, Tomasz Nowicki <tn@semihalf.com>
Subject: [PATCH V6 5/5] PCI: thunder: Enable ACPI PCI controller for ThunderX pass1.x silicon version
Date: Fri,  9 Sep 2016 21:24:07 +0200	[thread overview]
Message-ID: <1473449047-10499-6-git-send-email-tn@semihalf.com> (raw)
In-Reply-To: <1473449047-10499-1-git-send-email-tn@semihalf.com>

ThunderX pass1.x requires to emulate the EA headers for on-chip devices
hence it has to use custom pci_thunder_ecam_ops for accessing PCI config
space (pci-thuner-ecam.c). Add new entries to MCFG quirk array where they
can be applied while probing ACPI based PCI host controller.

ThunderX pass1.x is using the same way for accessing off-chip devices
(so-called PEM) as silicon pass-2.x so we need to add PEM quirk
entries too.

Quirk is considered for ThunderX silicon pass1.x only which is identified
via MCFG revision 2.

Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
---
 drivers/acpi/pci_mcfg.c             | 45 +++++++++++++++++++++++++++++++++++++
 drivers/pci/host/pci-thunder-ecam.c |  2 +-
 include/linux/pci-ecam.h            |  3 +++
 3 files changed, 49 insertions(+), 1 deletion(-)

diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
index 1f73d7b..eb14f74 100644
--- a/drivers/acpi/pci_mcfg.c
+++ b/drivers/acpi/pci_mcfg.c
@@ -77,6 +77,51 @@ static struct mcfg_fixup mcfg_quirks[] = {
 	  DEFINE_RES_MEM(0x994057000000UL, 0x39 * SZ_16M) },
 	{ "CAVIUM", "THUNDERX", 1, 19, MCFG_BUS_ANY, &pci_thunder_pem_ops,
 	  DEFINE_RES_MEM(0x99808f000000UL, 0x39 * SZ_16M) },
+
+	/* SoC pass1.x */
+	{ "CAVIUM", "THUNDERX", 2, 4, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+	  DEFINE_RES_MEM(0x88001f000000UL, 0x39 * SZ_16M) },
+	{ "CAVIUM", "THUNDERX", 2, 5, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+	  DEFINE_RES_MEM(0x884057000000UL, 0x39 * SZ_16M) },
+	{ "CAVIUM", "THUNDERX", 2, 6, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+	  DEFINE_RES_MEM(0x88808f000000UL, 0x39 * SZ_16M) },
+	{ "CAVIUM", "THUNDERX", 2, 7, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+	  DEFINE_RES_MEM(0x89001f000000UL, 0x39 * SZ_16M) },
+	{ "CAVIUM", "THUNDERX", 2, 8, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+	  DEFINE_RES_MEM(0x894057000000UL, 0x39 * SZ_16M) },
+	{ "CAVIUM", "THUNDERX", 2, 9, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+	  DEFINE_RES_MEM(0x89808f000000UL, 0x39 * SZ_16M) },
+	{ "CAVIUM", "THUNDERX", 2, 14, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+	  DEFINE_RES_MEM(0x98001f000000UL, 0x39 * SZ_16M) },
+	{ "CAVIUM", "THUNDERX", 2, 15, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+	  DEFINE_RES_MEM(0x984057000000UL, 0x39 * SZ_16M) },
+	{ "CAVIUM", "THUNDERX", 2, 16, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+	  DEFINE_RES_MEM(0x98808f000000UL, 0x39 * SZ_16M) },
+	{ "CAVIUM", "THUNDERX", 2, 17, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+	  DEFINE_RES_MEM(0x99001f000000UL, 0x39 * SZ_16M) },
+	{ "CAVIUM", "THUNDERX", 2, 18, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+	  DEFINE_RES_MEM(0x994057000000UL, 0x39 * SZ_16M) },
+	{ "CAVIUM", "THUNDERX", 2, 19, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+	  DEFINE_RES_MEM(0x99808f000000UL, 0x39 * SZ_16M) },
+#endif
+#ifdef CONFIG_PCI_HOST_THUNDER_ECAM
+	/* SoC pass1.x */
+	{ "CAVIUM", "THUNDERX", 2, 0, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+	  MCFG_RES_EMPTY},
+	{ "CAVIUM", "THUNDERX", 2, 1, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+	  MCFG_RES_EMPTY},
+	{ "CAVIUM", "THUNDERX", 2, 2, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+	  MCFG_RES_EMPTY},
+	{ "CAVIUM", "THUNDERX", 2, 3, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+	  MCFG_RES_EMPTY},
+	{ "CAVIUM", "THUNDERX", 2, 10, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+	  MCFG_RES_EMPTY},
+	{ "CAVIUM", "THUNDERX", 2, 11, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+	  MCFG_RES_EMPTY},
+	{ "CAVIUM", "THUNDERX", 2, 12, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+	  MCFG_RES_EMPTY},
+	{ "CAVIUM", "THUNDERX", 2, 13, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+	  MCFG_RES_EMPTY},
 #endif
 };
 
diff --git a/drivers/pci/host/pci-thunder-ecam.c b/drivers/pci/host/pci-thunder-ecam.c
index d50a3dc..b6c17e2 100644
--- a/drivers/pci/host/pci-thunder-ecam.c
+++ b/drivers/pci/host/pci-thunder-ecam.c
@@ -346,7 +346,7 @@ static int thunder_ecam_config_write(struct pci_bus *bus, unsigned int devfn,
 	return pci_generic_config_write(bus, devfn, where, size, val);
 }
 
-static struct pci_ecam_ops pci_thunder_ecam_ops = {
+struct pci_ecam_ops pci_thunder_ecam_ops = {
 	.bus_shift	= 20,
 	.pci_ops	= {
 		.map_bus        = pci_ecam_map_bus,
diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h
index 65505ea..35f0e81 100644
--- a/include/linux/pci-ecam.h
+++ b/include/linux/pci-ecam.h
@@ -62,6 +62,9 @@ extern struct pci_ecam_ops pci_generic_ecam_ops;
 #ifdef CONFIG_PCI_HOST_THUNDER_PEM
 extern struct pci_ecam_ops pci_thunder_pem_ops;
 #endif
+#ifdef CONFIG_PCI_HOST_THUNDER_ECAM
+extern struct pci_ecam_ops pci_thunder_ecam_ops;
+#endif
 
 #ifdef CONFIG_PCI_HOST_GENERIC
 /* for DT-based PCI controllers that support ECAM */
-- 
1.9.1

  parent reply	other threads:[~2016-09-09 19:25 UTC|newest]

Thread overview: 81+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-09 19:24 [PATCH V6 0/5] ECAM quirks handling for ARM64 platforms Tomasz Nowicki
2016-09-09 19:24 ` [PATCH V6 1/5] PCI/ACPI: Extend pci_mcfg_lookup() responsibilities Tomasz Nowicki
2016-09-09 19:24 ` [PATCH V6 2/5] PCI/ACPI: Check platform specific ECAM quirks Tomasz Nowicki
2016-09-12 22:24   ` Duc Dang
2016-09-12 22:47     ` Duc Dang
2016-09-13  5:58       ` Tomasz Nowicki
2016-09-13  6:37     ` Tomasz Nowicki
2016-09-13  2:36   ` Dongdong Liu
2016-09-13  6:32     ` Tomasz Nowicki
2016-09-13 11:38       ` Dongdong Liu
2016-09-14 12:40         ` Lorenzo Pieralisi
2016-09-15 10:58         ` Lorenzo Pieralisi
2016-09-16  9:02           ` Gabriele Paoloni
2016-09-16 12:27             ` Christopher Covington
2016-09-16 13:42               ` Gabriele Paoloni
2016-09-09 19:24 ` [PATCH V6 3/5] PCI: thunder-pem: Allow to probe PEM-specific register range for ACPI case Tomasz Nowicki
2016-09-19 18:09   ` Bjorn Helgaas
2016-09-20  7:23     ` Tomasz Nowicki
2016-09-20 13:33       ` Bjorn Helgaas
2016-09-20 13:40         ` Ard Biesheuvel
2016-09-20 14:05           ` Bjorn Helgaas
2016-09-20 15:09             ` Ard Biesheuvel
2016-09-20 19:17               ` Bjorn Helgaas
2016-09-21 14:05                 ` Lorenzo Pieralisi
2016-09-21 18:04                   ` Bjorn Helgaas
2016-09-21 18:58                     ` Duc Dang
2016-09-21 19:18                       ` Bjorn Helgaas
2016-09-23 10:53                         ` Tomasz Nowicki
2016-09-22  9:49                     ` Lorenzo Pieralisi
2016-09-22 11:10                       ` Gabriele Paoloni
2016-09-22 12:44                         ` Lorenzo Pieralisi
2016-09-22 18:31                           ` Bjorn Helgaas
2016-09-22 22:10                             ` Bjorn Helgaas
2016-09-23 10:11                               ` Lorenzo Pieralisi
2016-09-23 10:58                                 ` Gabriele Paoloni
2017-09-14 14:06                                   ` Ard Biesheuvel
2017-09-26  8:23                                     ` Gabriele Paoloni
2016-09-22 14:20                       ` Christopher Covington
2016-09-21 14:10                 ` Gabriele Paoloni
2016-09-21 18:59                   ` Bjorn Helgaas
2016-09-22 11:12                     ` Gabriele Paoloni
2016-09-09 19:24 ` [PATCH V6 4/5] PCI: thunder: Enable ACPI PCI controller for ThunderX pass2.x silicon version Tomasz Nowicki
2016-09-19 15:45   ` Bjorn Helgaas
2016-09-20  7:06     ` Tomasz Nowicki
2016-09-20 13:08       ` Bjorn Helgaas
2016-09-21  8:05         ` Tomasz Nowicki
2016-09-09 19:24 ` Tomasz Nowicki [this message]
2016-09-09 19:30 ` [PATCH V6 0/5] ECAM quirks handling for ARM64 platforms Tomasz Nowicki
2016-09-20 19:26 ` Bjorn Helgaas
2016-09-21  1:15   ` cov
2016-09-21 13:11     ` Bjorn Helgaas
2016-09-21 14:07       ` Sinan Kaya
2016-09-21 17:31         ` Bjorn Helgaas
2016-09-21 17:34           ` Sinan Kaya
2016-09-21 22:38           ` [PATCHv2] PCI: QDF2432 32 bit config space accessors Christopher Covington
2016-10-31 21:48             ` Bjorn Helgaas
2016-11-01 13:06               ` cov
2016-11-02 16:08                 ` Bjorn Helgaas
2016-11-02 16:36                   ` Sinan Kaya
2016-11-03 14:00                     ` Bjorn Helgaas
2016-11-03 16:58                       ` Sinan Kaya
2016-11-03 17:06                         ` Sinan Kaya
2016-11-03 20:43                         ` Bjorn Helgaas
2016-11-03 23:49                           ` Sinan Kaya
2016-12-02  4:58                       ` Jon Masters
2016-11-02 16:41                   ` Bjorn Helgaas
2016-11-09 19:25                   ` Christopher Covington
2016-11-09 20:06                     ` Bjorn Helgaas
2016-11-09 20:29                       ` Ard Biesheuvel
2016-11-09 22:49                         ` Bjorn Helgaas
2016-11-10 10:25                           ` Ard Biesheuvel
2016-11-10 13:57                             ` Lorenzo Pieralisi
2016-11-10 17:42                             ` Bjorn Helgaas
2016-12-02  5:12                               ` Jon Masters
2016-09-21 22:40       ` [PATCH V6 0/5] ECAM quirks handling for ARM64 platforms Christopher Covington
2016-09-22 23:08         ` Bjorn Helgaas
2016-09-23 18:41           ` Christopher Covington
2016-09-23 19:17             ` Bjorn Helgaas
2016-09-23 19:22               ` Christopher Covington
2016-11-24 11:05 ` [PATCH V6 1/1] ARM64/PCI: Manage controller-specific information on the host controller basis Tomasz Nowicki
2016-11-29 23:40   ` Bjorn Helgaas

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