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From: Tomasz Nowicki <tn@semihalf.com>
To: Duc Dang <dhdang@apm.com>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
	Will Deacon <will.deacon@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Rafael Wysocki <rafael@kernel.org>,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
	Arnd Bergmann <arnd@arndb.de>, Hanjun Guo <hanjun.guo@linaro.org>,
	Sinan Kaya <okaya@codeaurora.org>,
	Jayachandran C <jchandra@broadcom.com>,
	Christopher Covington <cov@codeaurora.org>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Robert Richter <robert.richter@caviumnetworks.com>,
	Marcin Wojtas <mw@semihalf.com>,
	Liviu Dudau <Liviu.Dudau@arm.com>,
	David Daney <ddaney@caviumnetworks.com>,
	Yijing Wang <wangyijing@huawei.com>,
	Mark Salter <msalter@redhat.com>,
	linux-pci@vger.kernel.org,
	linux-arm <linux-arm-kernel@lists.infradead.org>,
	linaro-acpi@lists.linaro.org, Jon Masters <jcm@redhat.com>,
	Andrea Gallo <andrea.gallo@linaro.org>,
	jeremy.linton@arm.com, Dongdong Liu <liudongdong3@huawei.com>,
	Gabriele Paoloni <gabriele.paoloni@huawei.com>,
	Jeffrey Hugo <jhugo@codeaurora.org>,
	linux-acpi@vger.kernel.org,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH V6 2/5] PCI/ACPI: Check platform specific ECAM quirks
Date: Tue, 13 Sep 2016 08:37:19 +0200	[thread overview]
Message-ID: <5bb5d2c3-32b1-7d88-8376-dc3e77bb665e@semihalf.com> (raw)
In-Reply-To: <CADaLNDk0JPJYT_pqjWYwrMBvbyWkpL+6=dEDU9H9qDGMhnQvyw@mail.gmail.com>

On 13.09.2016 00:24, Duc Dang wrote:
> On Fri, Sep 9, 2016 at 12:24 PM, Tomasz Nowicki <tn@semihalf.com> wrote:
>>
>> Some platforms may not be fully compliant with generic set of PCI config
>> accessors. For these cases we implement the way to overwrite CFG accessors
>> set and configuration space range.
>>
>> In first place pci_mcfg_parse() saves machine's IDs and revision number
>> (these come from MCFG header) in order to match against known quirk entries.
>> Then the algorithm traverses available quirk list (static array),
>> matches against <oem_id, oem_table_id, rev, domain, bus number range> and
>> returns custom PCI config ops and/or CFG resource structure.
>>
>> When adding new quirk there are two possibilities:
>> 1. Override default pci_generic_ecam_ops ops but CFG resource comes from MCFG
>> { "OEM_ID", "OEM_TABLE_ID", <REV>, <DOMAIN>, <BUS_NR>, &foo_ops, MCFG_RES_EMPTY },
>> 2. Override default pci_generic_ecam_ops ops and CFG resource. For this case
>> it is also allowed get CFG resource from quirk entry w/o having it in MCFG.
>> { "OEM_ID", "OEM_TABLE_ID", <REV>, <DOMAIN>, <BUS_NR>, &boo_ops,
>>   DEFINE_RES_MEM(START, SIZE) },
>>
>> pci_generic_ecam_ops and MCFG entries will be used for platforms
>> free from quirks.
>>
>> Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
>> Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
>> Signed-off-by: Christopher Covington <cov@codeaurora.org>
>> ---
>>  drivers/acpi/pci_mcfg.c | 80 +++++++++++++++++++++++++++++++++++++++++++++----
>>  1 file changed, 74 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
>> index ffcc651..2b8acc7 100644
>> --- a/drivers/acpi/pci_mcfg.c
>> +++ b/drivers/acpi/pci_mcfg.c
>> @@ -32,6 +32,59 @@ struct mcfg_entry {
>>         u8                      bus_start;
>>         u8                      bus_end;
>>  };
>> +struct mcfg_fixup {
>> +       char oem_id[ACPI_OEM_ID_SIZE + 1];
>> +       char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
>> +       u32 oem_revision;
>> +       u16 seg;
>> +       struct resource bus_range;
>> +       struct pci_ecam_ops *ops;
>> +       struct resource cfgres;
>> +};
>> +
>> +#define MCFG_DOM_ANY                   (-1)
>> +#define MCFG_BUS_RANGE(start, end)     DEFINE_RES_NAMED((start),       \
>> +                                               ((end) - (start) + 1),  \
>> +                                               NULL, IORESOURCE_BUS)
>> +#define MCFG_BUS_ANY           MCFG_BUS_RANGE(0x0, 0xff)
>> +#define MCFG_RES_EMPTY         DEFINE_RES_NAMED(0, 0, NULL, 0)
>> +
>> +static struct mcfg_fixup mcfg_quirks[] = {
>> +/*     { OEM_ID, OEM_TABLE_ID, REV, DOMAIN, BUS_RANGE, cfgres, ops }, */
>> +};
>> +
>> +static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
>> +static char mcfg_oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
>> +static u32 mcfg_oem_revision;
>> +
>> +static void pci_mcfg_match_quirks(struct acpi_pci_root *root,
>> +                                 struct resource *cfgres,
>> +                                 struct pci_ecam_ops **ecam_ops)
>> +{
>> +       struct mcfg_fixup *f;
>> +       int i;
>> +
>> +       /*
>> +        * First match against PCI topology <domain:bus> then use OEM ID, OEM
>> +        * table ID, and OEM revision from MCFG table standard header.
>> +        */
>> +       for (i = 0, f = mcfg_quirks; i < ARRAY_SIZE(mcfg_quirks); i++, f++) {
>> +               if (f->seg == root->segment &&
>
> Is dropping the comparison with MCFG_DOM_ANY intended? It is useful if
> all the controllers (segs) can use the same quirk (X-Gene case).

MCFG_DOM_ANY makes sense only if we want to use the same ops for segment 
range, but not for CFG range manipulation. So we can add MCFG_DOM_ANY 
back here in the hope it will be used properly.

Thanks,
Tomasz

  parent reply	other threads:[~2016-09-13  6:37 UTC|newest]

Thread overview: 81+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-09 19:24 [PATCH V6 0/5] ECAM quirks handling for ARM64 platforms Tomasz Nowicki
2016-09-09 19:24 ` [PATCH V6 1/5] PCI/ACPI: Extend pci_mcfg_lookup() responsibilities Tomasz Nowicki
2016-09-09 19:24 ` [PATCH V6 2/5] PCI/ACPI: Check platform specific ECAM quirks Tomasz Nowicki
2016-09-12 22:24   ` Duc Dang
2016-09-12 22:47     ` Duc Dang
2016-09-13  5:58       ` Tomasz Nowicki
2016-09-13  6:37     ` Tomasz Nowicki [this message]
2016-09-13  2:36   ` Dongdong Liu
2016-09-13  6:32     ` Tomasz Nowicki
2016-09-13 11:38       ` Dongdong Liu
2016-09-14 12:40         ` Lorenzo Pieralisi
2016-09-15 10:58         ` Lorenzo Pieralisi
2016-09-16  9:02           ` Gabriele Paoloni
2016-09-16 12:27             ` Christopher Covington
2016-09-16 13:42               ` Gabriele Paoloni
2016-09-09 19:24 ` [PATCH V6 3/5] PCI: thunder-pem: Allow to probe PEM-specific register range for ACPI case Tomasz Nowicki
2016-09-19 18:09   ` Bjorn Helgaas
2016-09-20  7:23     ` Tomasz Nowicki
2016-09-20 13:33       ` Bjorn Helgaas
2016-09-20 13:40         ` Ard Biesheuvel
2016-09-20 14:05           ` Bjorn Helgaas
2016-09-20 15:09             ` Ard Biesheuvel
2016-09-20 19:17               ` Bjorn Helgaas
2016-09-21 14:05                 ` Lorenzo Pieralisi
2016-09-21 18:04                   ` Bjorn Helgaas
2016-09-21 18:58                     ` Duc Dang
2016-09-21 19:18                       ` Bjorn Helgaas
2016-09-23 10:53                         ` Tomasz Nowicki
2016-09-22  9:49                     ` Lorenzo Pieralisi
2016-09-22 11:10                       ` Gabriele Paoloni
2016-09-22 12:44                         ` Lorenzo Pieralisi
2016-09-22 18:31                           ` Bjorn Helgaas
2016-09-22 22:10                             ` Bjorn Helgaas
2016-09-23 10:11                               ` Lorenzo Pieralisi
2016-09-23 10:58                                 ` Gabriele Paoloni
2017-09-14 14:06                                   ` Ard Biesheuvel
2017-09-26  8:23                                     ` Gabriele Paoloni
2016-09-22 14:20                       ` Christopher Covington
2016-09-21 14:10                 ` Gabriele Paoloni
2016-09-21 18:59                   ` Bjorn Helgaas
2016-09-22 11:12                     ` Gabriele Paoloni
2016-09-09 19:24 ` [PATCH V6 4/5] PCI: thunder: Enable ACPI PCI controller for ThunderX pass2.x silicon version Tomasz Nowicki
2016-09-19 15:45   ` Bjorn Helgaas
2016-09-20  7:06     ` Tomasz Nowicki
2016-09-20 13:08       ` Bjorn Helgaas
2016-09-21  8:05         ` Tomasz Nowicki
2016-09-09 19:24 ` [PATCH V6 5/5] PCI: thunder: Enable ACPI PCI controller for ThunderX pass1.x " Tomasz Nowicki
2016-09-09 19:30 ` [PATCH V6 0/5] ECAM quirks handling for ARM64 platforms Tomasz Nowicki
2016-09-20 19:26 ` Bjorn Helgaas
2016-09-21  1:15   ` cov
2016-09-21 13:11     ` Bjorn Helgaas
2016-09-21 14:07       ` Sinan Kaya
2016-09-21 17:31         ` Bjorn Helgaas
2016-09-21 17:34           ` Sinan Kaya
2016-09-21 22:38           ` [PATCHv2] PCI: QDF2432 32 bit config space accessors Christopher Covington
2016-10-31 21:48             ` Bjorn Helgaas
2016-11-01 13:06               ` cov
2016-11-02 16:08                 ` Bjorn Helgaas
2016-11-02 16:36                   ` Sinan Kaya
2016-11-03 14:00                     ` Bjorn Helgaas
2016-11-03 16:58                       ` Sinan Kaya
2016-11-03 17:06                         ` Sinan Kaya
2016-11-03 20:43                         ` Bjorn Helgaas
2016-11-03 23:49                           ` Sinan Kaya
2016-12-02  4:58                       ` Jon Masters
2016-11-02 16:41                   ` Bjorn Helgaas
2016-11-09 19:25                   ` Christopher Covington
2016-11-09 20:06                     ` Bjorn Helgaas
2016-11-09 20:29                       ` Ard Biesheuvel
2016-11-09 22:49                         ` Bjorn Helgaas
2016-11-10 10:25                           ` Ard Biesheuvel
2016-11-10 13:57                             ` Lorenzo Pieralisi
2016-11-10 17:42                             ` Bjorn Helgaas
2016-12-02  5:12                               ` Jon Masters
2016-09-21 22:40       ` [PATCH V6 0/5] ECAM quirks handling for ARM64 platforms Christopher Covington
2016-09-22 23:08         ` Bjorn Helgaas
2016-09-23 18:41           ` Christopher Covington
2016-09-23 19:17             ` Bjorn Helgaas
2016-09-23 19:22               ` Christopher Covington
2016-11-24 11:05 ` [PATCH V6 1/1] ARM64/PCI: Manage controller-specific information on the host controller basis Tomasz Nowicki
2016-11-29 23:40   ` Bjorn Helgaas

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