From: Yuriy Kolerov <yuriy.kolerov@synopsys.com>
To: linux-snps-arc@lists.infradead.org
Cc: Vineet.Gupta1@synopsys.com, Alexey.Brodkin@synopsys.com,
linux-kernel@vger.kernel.org, marc.zyngier@arm.com,
Yuriy Kolerov <yuriy.kolerov@synopsys.com>
Subject: [PATCH v2 1/4] ARCv2: IRQ: Move structure for build register of core intc to the header
Date: Tue, 31 Jan 2017 14:45:21 +0300 [thread overview]
Message-ID: <1485863124-26426-2-git-send-email-yuriy.kolerov@synopsys.com> (raw)
In-Reply-To: <1485863124-26426-1-git-send-email-yuriy.kolerov@synopsys.com>
Also add new macro ARC_REG_STATUS32 for the address of STATUS32
auxiliary register. It is better to use it instead of magic numbers.
Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com>
---
arch/arc/include/asm/arcregs.h | 11 +++++++++++
arch/arc/kernel/intc-arcv2.c | 10 ++--------
2 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index f659942..2328244 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -38,6 +38,9 @@
#define ARC_REG_CLUSTER_BCR 0xcf
#define ARC_REG_AUX_ICCM 0x208 /* ICCM Base Addr (ARCv2) */
+/* Common for ARCompact and ARCv2 status register */
+#define ARC_REG_STATUS32 0x0A
+
/* status32 Bits Positions */
#define STATUS_AE_BIT 5 /* Exception active */
#define STATUS_DE_BIT 6 /* PC is in delay slot */
@@ -233,6 +236,14 @@ struct bcr_generic {
#endif
};
+struct bcr_irq_arcv2 {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+ unsigned int pad:3, firq:1, prio:4, exts:8, irqs:8, ver:8;
+#else
+ unsigned int ver:8, irqs:8, exts:8, prio:4, firq:1, pad:3;
+#endif
+};
+
/*
*******************************************************************
* Generic structures to hold build configuration used at runtime
diff --git a/arch/arc/kernel/intc-arcv2.c b/arch/arc/kernel/intc-arcv2.c
index ecef0fb..9de0665 100644
--- a/arch/arc/kernel/intc-arcv2.c
+++ b/arch/arc/kernel/intc-arcv2.c
@@ -24,13 +24,7 @@ void arc_init_IRQ(void)
{
unsigned int tmp, irq_prio;
- struct irq_build {
-#ifdef CONFIG_CPU_BIG_ENDIAN
- unsigned int pad:3, firq:1, prio:4, exts:8, irqs:8, ver:8;
-#else
- unsigned int ver:8, irqs:8, exts:8, prio:4, firq:1, pad:3;
-#endif
- } irq_bcr;
+ struct bcr_irq_arcv2 irq_bcr;
struct aux_irq_ctrl {
#ifdef CONFIG_CPU_BIG_ENDIAN
@@ -69,7 +63,7 @@ void arc_init_IRQ(void)
irq_bcr.firq ? " FIRQ (not used)":"");
/* setup status32, don't enable intr yet as kernel doesn't want */
- tmp = read_aux_reg(0xa);
+ tmp = read_aux_reg(ARC_REG_STATUS32);
tmp |= STATUS_AD_MASK | (ARCV2_IRQ_DEF_PRIO << 1);
tmp &= ~STATUS_IE_MASK;
asm volatile("kflag %0 \n"::"r"(tmp));
--
2.7.4
next prev parent reply other threads:[~2017-01-31 11:46 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-31 11:45 [PATCH v2 0/4] Use build registers for getting numbers of interrupts Yuriy Kolerov
2017-01-31 11:45 ` Yuriy Kolerov [this message]
2017-01-31 17:40 ` [PATCH v2 1/4] ARCv2: IRQ: Move structure for build register of core intc to the header Vineet Gupta
2017-01-31 18:15 ` Vineet Gupta
2017-01-31 11:45 ` [PATCH v2 2/4] ARCv2: IRQ: Remove option for setting number of interrupts Yuriy Kolerov
2017-01-31 17:40 ` Vineet Gupta
2017-01-31 11:45 ` [PATCH v2 3/4] ARCv2: IRQ: Use build registers for getting numbers " Yuriy Kolerov
2017-01-31 17:46 ` Vineet Gupta
2017-01-31 11:45 ` [PATCH v2 4/4] ARCv2: IRQ: Set a default priority for all core interrupts Yuriy Kolerov
2017-01-31 17:54 ` Vineet Gupta
2017-02-01 12:54 ` Yuriy Kolerov
2017-02-01 20:58 ` [PATCH v2 0/4] Use build registers for getting numbers of interrupts Vineet Gupta
2017-02-01 23:59 ` Yuriy Kolerov
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