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From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: tglx@linutronix.de, daniel.lezcano@linaro.org
Cc: linux-kernel@vger.kernel.org,
	Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [PATCH 04/17] clocksource/drivers/sh_cmt: Remove support for "renesas,cmt-32*"
Date: Sun, 29 Oct 2017 22:20:21 +0100	[thread overview]
Message-ID: <1509312035-17368-4-git-send-email-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <1509312035-17368-1-git-send-email-daniel.lezcano@linaro.org>

From: Geert Uytterhoeven <geert+renesas@glider.be>

Remove driver matching support for the unused "renesas,cmt-32" and
"renesas,cmt-32-fast" compatible values, cfr. commit 203bb3479958c48a
("devicetree: bindings: Remove unused 32-bit CMT bindings").

As this removes the last user of SH_CMT_32BIT_FAST, all support for this
variant is removed from the driver.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/sh_cmt.c | 20 --------------------
 1 file changed, 20 deletions(-)

diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
index 45af436..8546736 100644
--- a/drivers/clocksource/sh_cmt.c
+++ b/drivers/clocksource/sh_cmt.c
@@ -66,7 +66,6 @@ struct sh_cmt_device;
 enum sh_cmt_model {
 	SH_CMT_16BIT,
 	SH_CMT_32BIT,
-	SH_CMT_32BIT_FAST,
 	SH_CMT_48BIT,
 	SH_CMT0_RCAR_GEN2,
 	SH_CMT1_RCAR_GEN2,
@@ -203,16 +202,6 @@ static const struct sh_cmt_info sh_cmt_info[] = {
 		.read_count = sh_cmt_read32,
 		.write_count = sh_cmt_write32,
 	},
-	[SH_CMT_32BIT_FAST] = {
-		.model = SH_CMT_32BIT_FAST,
-		.width = 32,
-		.overflow_bit = SH_CMT32_CMCSR_CMF,
-		.clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF),
-		.read_control = sh_cmt_read16,
-		.write_control = sh_cmt_write16,
-		.read_count = sh_cmt_read32,
-		.write_count = sh_cmt_write32,
-	},
 	[SH_CMT_48BIT] = {
 		.model = SH_CMT_48BIT,
 		.channels_mask = 0x3f,
@@ -890,13 +879,6 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
 	case SH_CMT_48BIT:
 		ch->ioctrl = cmt->mapbase + 0x10 + ch->hwidx * 0x10;
 		break;
-	case SH_CMT_32BIT_FAST:
-		/*
-		 * The 32-bit "fast" timer has a single channel at hwidx 5 but
-		 * is located at offset 0x40 instead of 0x60 for some reason.
-		 */
-		ch->ioctrl = cmt->mapbase + 0x40;
-		break;
 	case SH_CMT0_RCAR_GEN2:
 	case SH_CMT1_RCAR_GEN2:
 		ch->iostart = cmt->mapbase + ch->hwidx * 0x100;
@@ -952,8 +934,6 @@ static const struct platform_device_id sh_cmt_id_table[] = {
 MODULE_DEVICE_TABLE(platform, sh_cmt_id_table);
 
 static const struct of_device_id sh_cmt_of_table[] __maybe_unused = {
-	{ .compatible = "renesas,cmt-32", .data = &sh_cmt_info[SH_CMT_32BIT] },
-	{ .compatible = "renesas,cmt-32-fast", .data = &sh_cmt_info[SH_CMT_32BIT_FAST] },
 	{ .compatible = "renesas,cmt-48", .data = &sh_cmt_info[SH_CMT_48BIT] },
 	{ .compatible = "renesas,cmt-48-gen2", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] },
 	{ .compatible = "renesas,rcar-gen2-cmt0", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] },
-- 
2.7.4

  parent reply	other threads:[~2017-10-29 21:24 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-29 21:20 [GIT PULL] clockevents / clocksources for 4.15 Daniel Lezcano
2017-10-29 21:20 ` [PATCH 01/17] dt-bindings: timer: renesas, cmt: Fix SoC-specific compatible values Daniel Lezcano
2017-10-29 21:20   ` [PATCH 02/17] clocksource/drivers/sh_cmt: Use 0x3f mask for SH_CMT_48BIT case Daniel Lezcano
2017-10-29 21:20   ` [PATCH 03/17] clocksource/drivers/sh_cmt: Support separate R-Car Gen2 CMT0/1 Daniel Lezcano
2017-10-29 21:20   ` Daniel Lezcano [this message]
2017-10-29 21:20   ` [PATCH 05/17] clocksource/drivers/sh_cmt: Mark "renesas,cmt-48-gen2" deprecated Daniel Lezcano
2017-10-29 21:20   ` [PATCH 06/17] clocksource/drivers/sh_cmt: Remove unused "renesas, channels-mask" handling Daniel Lezcano
2017-10-29 21:20   ` [PATCH 07/17] clocksource/drivers/sh_cmt: Use of_device_get_match_data() helper Daniel Lezcano
2017-10-29 21:20   ` [PATCH 08/17] clocksource/drivers/fttmr010: pr_err() strings should end with newlines Daniel Lezcano
2017-10-29 21:20   ` [PATCH 09/17] clocksource/drivers/owl: " Daniel Lezcano
2017-10-29 21:20   ` [PATCH 10/17] clocksource/drivers/rockchip: " Daniel Lezcano
2017-10-29 21:20   ` [PATCH 11/17] clocksource: Improve GENERIC_CLOCKEVENTS dependency Daniel Lezcano
2017-10-29 21:20   ` [PATCH 12/17] MAINTAINERS: Fix path and add bindings to timers Daniel Lezcano
2017-10-29 21:20   ` [PATCH 13/17] clocksource/drivers/arm_arch_timer: Validate CNTFRQ after enabling frame Daniel Lezcano
2017-10-29 21:20   ` [PATCH 14/17] clocksource/drivers/arm_arch_timer: Fix DEFINE_PER_CPU expansion Daniel Lezcano
2017-10-29 21:20   ` [PATCH 15/17] clocksource/drivers/mips-gic-timer: Remove pointless irq_save,restore Daniel Lezcano
2017-10-29 21:20   ` [PATCH 16/17] clocksource/drivers/mips-gic-timer: Add fastpath for local timer updates Daniel Lezcano
2017-10-29 21:20   ` [PATCH 17/17] clocksource/drivers/timer-of: Add timer_of_exit function Daniel Lezcano

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