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From: Luwei Kang <luwei.kang@intel.com>
To: kvm@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com,
	x86@kernel.org, pbonzini@redhat.com, rkrcmar@redhat.com,
	linux-kernel@vger.kernel.org, joro@8bytes.org,
	Chao Peng <chao.p.peng@linux.intel.com>,
	Luwei Kang <luwei.kang@intel.com>
Subject: [PATCH V4 08/11] KVM: x86: Add Intel processor trace context for each vcpu
Date: Mon, 11 Dec 2017 04:30:54 +0800	[thread overview]
Message-ID: <1512937857-10477-9-git-send-email-luwei.kang@intel.com> (raw)
In-Reply-To: <1512937857-10477-1-git-send-email-luwei.kang@intel.com>

From: Chao Peng <chao.p.peng@linux.intel.com>

Add a data structure to save Intel Processor Trace context.
It mainly include the MSRs related Intel Processor Trace.

Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com>
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
---
 arch/x86/include/asm/msr-index.h |  1 +
 arch/x86/include/asm/vmx.h       |  2 ++
 arch/x86/kvm/vmx.c               | 17 +++++++++++++++++
 3 files changed, 20 insertions(+)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index fd98ef0..03ffde6 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -136,6 +136,7 @@
 #define MSR_IA32_RTIT_ADDR2_B		0x00000585
 #define MSR_IA32_RTIT_ADDR3_A		0x00000586
 #define MSR_IA32_RTIT_ADDR3_B		0x00000587
+#define MSR_IA32_RTIT_ADDR_COUNT	8
 #define MSR_IA32_RTIT_CR3_MATCH		0x00000572
 #define MSR_IA32_RTIT_OUTPUT_BASE	0x00000560
 #define MSR_IA32_RTIT_OUTPUT_MASK	0x00000561
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index 27d5d37..9e828d4 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -240,6 +240,8 @@ enum vmcs_field {
 	GUEST_PDPTR3_HIGH               = 0x00002811,
 	GUEST_BNDCFGS                   = 0x00002812,
 	GUEST_BNDCFGS_HIGH              = 0x00002813,
+	GUEST_IA32_RTIT_CTL		= 0x00002814,
+	GUEST_IA32_RTIT_CTL_HIGH	= 0x00002815,
 	HOST_IA32_PAT			= 0x00002c00,
 	HOST_IA32_PAT_HIGH		= 0x00002c01,
 	HOST_IA32_EFER			= 0x00002c02,
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index e2de089..7761c25 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -581,6 +581,21 @@ static inline int pi_test_sn(struct pi_desc *pi_desc)
 			(unsigned long *)&pi_desc->control);
 }
 
+struct pt_ctx {
+	u64 ctl;
+	u64 status;
+	u64 output_base;
+	u64 output_mask;
+	u64 cr3_match;
+	u64 addrs[MSR_IA32_RTIT_ADDR_COUNT];
+};
+
+struct pt_desc {
+	unsigned int addr_num;
+	struct pt_ctx host;
+	struct pt_ctx guest;
+};
+
 struct vcpu_vmx {
 	struct kvm_vcpu       vcpu;
 	unsigned long         host_rsp;
@@ -670,6 +685,8 @@ struct vcpu_vmx {
 	 */
 	u64 msr_ia32_feature_control;
 	u64 msr_ia32_feature_control_valid_bits;
+
+	struct pt_desc pt_desc;
 };
 
 enum segment_cache_field {
-- 
1.8.3.1

  parent reply	other threads:[~2017-12-11 10:16 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-10 20:30 [PATCH V4 00/11] Intel Processor Trace virtulization enabling Luwei Kang
2017-12-10 20:30 ` [PATCH V4 01/11] perf/x86/intel/pt: Move Intel-PT MSR bit definitions to a public header Luwei Kang
2017-12-10 20:30 ` [PATCH V4 02/11] perf/x86/intel/pt: Change pt_cap_get() to a public function Luwei Kang
2017-12-10 20:30 ` [PATCH V4 03/11] KVM: x86: Add Intel Processor Trace virtualization mode Luwei Kang
2017-12-10 20:30 ` [PATCH V4 04/11] x86: cpufeature: move processor tracing out of scattered features Luwei Kang
2017-12-10 20:30 ` [PATCH V4 05/11] KVM: x86: Add Intel Processor Trace cpuid emulation Luwei Kang
2017-12-10 20:30 ` [PATCH V4 06/11] KVM: x86: Add a function to get the number of address ranges Luwei Kang
2017-12-10 20:30 ` [PATCH V4 07/11] KVM: x86: Add a function to disable/enable Intel PT MSRs intercept Luwei Kang
2017-12-10 20:30 ` Luwei Kang [this message]
2017-12-10 20:30 ` [PATCH V4 09/11] KVM: x86: Disable Intel Processor Trace when VMXON in L1 guest Luwei Kang
     [not found]   ` <CALMp9eT63cMpJYBLP=9nSApP+=kwyht-XiDamHd6APfXr269Bg@mail.gmail.com>
2018-01-09 21:39     ` Paolo Bonzini
2017-12-10 20:30 ` [PATCH V4 10/11] KVM: x86: Implement Intel Processor Trace MSRs read/write Luwei Kang
2017-12-10 20:30 ` [PATCH V4 11/11] KVM: x86: Implement Intel Processor Trace context switch Luwei Kang
2017-12-12 17:06   ` Paolo Bonzini
2017-12-12 17:09 ` [PATCH V4 00/11] Intel Processor Trace virtulization enabling Paolo Bonzini

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