From: Paolo Bonzini <pbonzini@redhat.com>
To: Jim Mattson <jmattson@google.com>, Luwei Kang <luwei.kang@intel.com>
Cc: "kvm list" <kvm@vger.kernel.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Ingo Molnar" <mingo@redhat.com>,
"H . Peter Anvin" <hpa@zytor.com>,
"the arch/x86 maintainers" <x86@kernel.org>,
"Radim Krčmář" <rkrcmar@redhat.com>,
LKML <linux-kernel@vger.kernel.org>,
"Joerg Roedel" <joro@8bytes.org>
Subject: Re: [PATCH V4 09/11] KVM: x86: Disable Intel Processor Trace when VMXON in L1 guest
Date: Tue, 9 Jan 2018 22:39:51 +0100 [thread overview]
Message-ID: <69b9277e-e547-95e9-f220-958549f45ec1@redhat.com> (raw)
In-Reply-To: <CALMp9eT63cMpJYBLP=9nSApP+=kwyht-XiDamHd6APfXr269Bg@mail.gmail.com>
On 09/01/2018 21:16, Jim Mattson wrote:
> This doesn't look right to me. pt_disable_intercept_for_msr calls
> either vmx_disable_intercept_for_msr or vmx_enable_intercept_for_msr,
> both of which only change vmx_msr_bitmap_legacy
> and vmx_msr_bitmap_longmode. Neither of these MSR permission bitmaps is
> likely to be the one in use by L1 (which is more likely to be using the
> mode-appropriate x2apic or x2apic_apicv bitmap). Moreover, these changes
> affect all of the VMs that are using those MSR permission bitmaps.
Yeah, I replied this morning with something like this, on the thread
about removing the longmode bitmaps.
Paolo
next prev parent reply other threads:[~2018-01-09 21:40 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-10 20:30 [PATCH V4 00/11] Intel Processor Trace virtulization enabling Luwei Kang
2017-12-10 20:30 ` [PATCH V4 01/11] perf/x86/intel/pt: Move Intel-PT MSR bit definitions to a public header Luwei Kang
2017-12-10 20:30 ` [PATCH V4 02/11] perf/x86/intel/pt: Change pt_cap_get() to a public function Luwei Kang
2017-12-10 20:30 ` [PATCH V4 03/11] KVM: x86: Add Intel Processor Trace virtualization mode Luwei Kang
2017-12-10 20:30 ` [PATCH V4 04/11] x86: cpufeature: move processor tracing out of scattered features Luwei Kang
2017-12-10 20:30 ` [PATCH V4 05/11] KVM: x86: Add Intel Processor Trace cpuid emulation Luwei Kang
2017-12-10 20:30 ` [PATCH V4 06/11] KVM: x86: Add a function to get the number of address ranges Luwei Kang
2017-12-10 20:30 ` [PATCH V4 07/11] KVM: x86: Add a function to disable/enable Intel PT MSRs intercept Luwei Kang
2017-12-10 20:30 ` [PATCH V4 08/11] KVM: x86: Add Intel processor trace context for each vcpu Luwei Kang
2017-12-10 20:30 ` [PATCH V4 09/11] KVM: x86: Disable Intel Processor Trace when VMXON in L1 guest Luwei Kang
[not found] ` <CALMp9eT63cMpJYBLP=9nSApP+=kwyht-XiDamHd6APfXr269Bg@mail.gmail.com>
2018-01-09 21:39 ` Paolo Bonzini [this message]
2017-12-10 20:30 ` [PATCH V4 10/11] KVM: x86: Implement Intel Processor Trace MSRs read/write Luwei Kang
2017-12-10 20:30 ` [PATCH V4 11/11] KVM: x86: Implement Intel Processor Trace context switch Luwei Kang
2017-12-12 17:06 ` Paolo Bonzini
2017-12-12 17:09 ` [PATCH V4 00/11] Intel Processor Trace virtulization enabling Paolo Bonzini
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