From: Zhang Rui <rui.zhang@intel.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
LKML <linux-kernel@vger.kernel.org>, linux-x86 <x86@kernel.org>,
Len Brown <len.brown@intel.com>,
"Chen, Yu C" <yu.c.chen@intel.com>
Subject: Re: Regression: unable to boot after commit bd9240a18edf ("x86/apic: Add TSC_DEADLINE quirk due to errata") - Surface Pro 4 SKL
Date: Wed, 20 Dec 2017 22:08:21 +0800 [thread overview]
Message-ID: <1513778901.2592.0.camel@intel.com> (raw)
In-Reply-To: <20171219172327.bcpss5in2k4346xh@hirez.programming.kicks-ass.net>
On Tue, 2017-12-19 at 18:23 +0100, Peter Zijlstra wrote:
> On Tue, Dec 19, 2017 at 05:01:55PM +0100, Peter Zijlstra wrote:
> >
> > On Tue, Dec 19, 2017 at 11:42:41PM +0800, Zhang Rui wrote:
> > >
> > > On Tue, 2017-12-19 at 16:23 +0100, Peter Zijlstra wrote:
> > >
> > > >
> > > > [ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2
> > > > dfl dfl)
> > > > [ 0.000000] ACPI: IRQ0 used by override.
> > > >
> > > > So your ACPI table has an override for IRQ2 and routes it to
> > > > IRQ0.
> > ^ this
> >
> > >
> > > >
> > > > The HPET document says:
> > > >
> > > > If the ENABLE_CNF bit and the LEG_RT_CNF bit are both set,
> > > > then the
> > > > interrupts will be routed as follows:
> > > >
> > > > Timer 0 will be routed to IRQ0 in Non-APIC or IRQ2 in the
> > > > I/O APIC
> > > But AFAICS, the HPET emulated timer interrupts goes to IRQ0
> > Right, so see that ACPI override, that routes I/O APIC IRQ2 to
> > IRQ0, or
> > it _should_.
> >
> > Clearly something is messed up here.. but I've no idea what. That
> > whole
> > IRQ routing stuff is confusing.
> Does this help?
>
No.
thanks,
rui
> diff --git a/arch/x86/kernel/time.c b/arch/x86/kernel/time.c
> index 749d189f8cd4..45675072771c 100644
> --- a/arch/x86/kernel/time.c
> +++ b/arch/x86/kernel/time.c
> @@ -69,8 +69,6 @@ static struct irqaction irq0 = {
>
> static void __init setup_default_timer_irq(void)
> {
> - if (!nr_legacy_irqs())
> - return;
> setup_irq(0, &irq0);
> }
>
next prev parent reply other threads:[~2017-12-20 14:08 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-28 2:08 Zhang Rui
2017-11-28 8:14 ` Peter Zijlstra
2017-11-28 8:22 ` Zhang Rui
2017-11-28 9:34 ` Thomas Gleixner
2017-11-28 10:59 ` Zhang Rui
2017-11-28 12:36 ` Peter Zijlstra
2017-11-29 14:44 ` Zhang Rui
2017-12-18 20:28 ` Peter Zijlstra
2017-12-19 10:48 ` Zhang Rui
2017-12-19 13:15 ` Peter Zijlstra
2017-12-19 15:23 ` Zhang Rui
2017-12-19 15:23 ` Peter Zijlstra
2017-12-19 15:31 ` Peter Zijlstra
2017-12-19 15:43 ` Zhang Rui
2017-12-19 15:42 ` Zhang Rui
2017-12-19 16:01 ` Peter Zijlstra
2017-12-19 17:23 ` Peter Zijlstra
2017-12-20 14:08 ` Zhang Rui [this message]
2017-12-20 14:48 ` Peter Zijlstra
2017-11-28 9:35 ` Peter Zijlstra
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1513778901.2592.0.camel@intel.com \
--to=rui.zhang@intel.com \
--cc=len.brown@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=peterz@infradead.org \
--cc=tglx@linutronix.de \
--cc=x86@kernel.org \
--cc=yu.c.chen@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
Powered by JetHome