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From: Manu Gautam <mgautam@codeaurora.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org,
	Manu Gautam <mgautam@codeaurora.org>,
	Vivek Gautam <vivek.gautam@codeaurora.org>,
	Varadarajan Narayanan <varada@codeaurora.org>,
	Wei Yongjun <weiyongjun1@huawei.com>,
	Fengguang Wu <fengguang.wu@intel.com>,
	linux-kernel@vger.kernel.org (open list:GENERIC PHY FRAMEWORK)
Subject: [PATCH v5 03/17] phy: qcom-qmp: Power-on PHY before initialization
Date: Tue, 16 Jan 2018 16:26:58 +0530	[thread overview]
Message-ID: <1516100232-18623-4-git-send-email-mgautam@codeaurora.org> (raw)
In-Reply-To: <1516100232-18623-1-git-send-email-mgautam@codeaurora.org>

PHY regulators which are enabled from power_on() must be ON
before turning-on clocks and initializing it as part of init().
As most of the core drivers perform power_on() after init(), move
PHY regulators enable to com_init() and use power_on() to
only enable pipe_clk. This pipe_clk is output from PHY and some
core drivers e.g. PCIe follow specific sequence after phy_init()
that mandates pipe_clk to be enabled from power_on() only.
On similar lines move clk_enable from init() to com_init() which
executes once for multi lane PHYs.

Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
---
 drivers/phy/qualcomm/phy-qcom-qmp.c | 61 +++++++++++++++----------------------
 1 file changed, 24 insertions(+), 37 deletions(-)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 5fed1ae..1b82cea 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -724,36 +724,13 @@ static int qcom_qmp_phy_poweron(struct phy *phy)
 {
 	struct qmp_phy *qphy = phy_get_drvdata(phy);
 	struct qcom_qmp *qmp = qphy->qmp;
-	int num = qmp->cfg->num_vregs;
 	int ret;
 
-	dev_vdbg(&phy->dev, "Powering on QMP phy\n");
-
-	/* turn on regulator supplies */
-	ret = regulator_bulk_enable(num, qmp->vregs);
-	if (ret) {
-		dev_err(qmp->dev, "failed to enable regulators, err=%d\n", ret);
-		return ret;
-	}
-
 	ret = clk_prepare_enable(qphy->pipe_clk);
-	if (ret) {
+	if (ret)
 		dev_err(qmp->dev, "pipe_clk enable failed, err=%d\n", ret);
-		regulator_bulk_disable(num, qmp->vregs);
-		return ret;
-	}
 
-	return 0;
-}
-
-static int qcom_qmp_phy_poweroff(struct phy *phy)
-{
-	struct qmp_phy *qphy = phy_get_drvdata(phy);
-	struct qcom_qmp *qmp = qphy->qmp;
-
-	regulator_bulk_disable(qmp->cfg->num_vregs, qmp->vregs);
-
-	return 0;
+	return ret;
 }
 
 static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
@@ -768,6 +745,19 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
 		return 0;
 	}
 
+	/* turn on regulator supplies */
+	ret = regulator_bulk_enable(cfg->num_vregs, qmp->vregs);
+	if (ret) {
+		dev_err(qmp->dev, "failed to enable regulators, err=%d\n", ret);
+		goto err_reg_enable;
+	}
+
+	ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks);
+	if (ret) {
+		dev_err(qmp->dev, "failed to enable clks, err=%d\n", ret);
+		goto err_clk_enable;
+	}
+
 	for (i = 0; i < cfg->num_resets; i++) {
 		ret = reset_control_deassert(qmp->resets[i]);
 		if (ret) {
@@ -812,6 +802,10 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
 err_rst:
 	while (--i >= 0)
 		reset_control_assert(qmp->resets[i]);
+	clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
+err_clk_enable:
+	regulator_bulk_disable(cfg->num_vregs, qmp->vregs);
+err_reg_enable:
 	mutex_unlock(&qmp->phy_mutex);
 
 	return ret;
@@ -841,6 +835,10 @@ static int qcom_qmp_phy_com_exit(struct qcom_qmp *qmp)
 	while (--i >= 0)
 		reset_control_assert(qmp->resets[i]);
 
+	clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
+
+	regulator_bulk_disable(cfg->num_vregs, qmp->vregs);
+
 	mutex_unlock(&qmp->phy_mutex);
 
 	return 0;
@@ -861,15 +859,9 @@ static int qcom_qmp_phy_init(struct phy *phy)
 
 	dev_vdbg(qmp->dev, "Initializing QMP phy\n");
 
-	ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks);
-	if (ret) {
-		dev_err(qmp->dev, "failed to enable clks, err=%d\n", ret);
-		return ret;
-	}
-
 	ret = qcom_qmp_phy_com_init(qmp);
 	if (ret)
-		goto err_com_init;
+		return ret;
 
 	if (cfg->has_lane_rst) {
 		ret = reset_control_deassert(qphy->lane_rst);
@@ -917,8 +909,6 @@ static int qcom_qmp_phy_init(struct phy *phy)
 		reset_control_assert(qphy->lane_rst);
 err_lane_rst:
 	qcom_qmp_phy_com_exit(qmp);
-err_com_init:
-	clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
 
 	return ret;
 }
@@ -945,8 +935,6 @@ static int qcom_qmp_phy_exit(struct phy *phy)
 
 	qcom_qmp_phy_com_exit(qmp);
 
-	clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
-
 	return 0;
 }
 
@@ -1060,7 +1048,6 @@ static int phy_pipe_clk_register(struct qcom_qmp *qmp, struct device_node *np)
 	.init		= qcom_qmp_phy_init,
 	.exit		= qcom_qmp_phy_exit,
 	.power_on	= qcom_qmp_phy_poweron,
-	.power_off	= qcom_qmp_phy_poweroff,
 	.owner		= THIS_MODULE,
 };
 
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

  parent reply	other threads:[~2018-01-16 10:57 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1516100232-18623-1-git-send-email-mgautam@codeaurora.org>
2018-01-16 10:56 ` [PATCH v5 01/17] phy: qcom-qmp: Fix phy pipe clock gating Manu Gautam
2018-01-16 10:56 ` [PATCH v5 02/17] phy: qcom-qmp: Adapt to clk_bulk_* APIs Manu Gautam
2018-01-16 10:56 ` Manu Gautam [this message]
2018-01-16 10:56 ` [PATCH v5 04/17] phy: qcom-qusb2: Power-on PHY before initialization Manu Gautam
2018-01-16 10:57 ` [PATCH v5 05/17] phy: qcom-qmp: Fix PHY block reset sequence Manu Gautam
2018-01-16 10:57 ` [PATCH v5 06/17] phy: qcom-qmp: Move SERDES/PCS START after PHY reset Manu Gautam
2018-01-16 10:57 ` [PATCH v5 07/17] phy: qcom-qusb2: Add support for different register layouts Manu Gautam
2018-01-16 10:57 ` [PATCH v5 08/17] dt-bindings: phy-qcom-qusb2: Update binding for QUSB2 V2 version Manu Gautam
2018-01-16 10:57 ` [PATCH v5 09/17] phy: qcom-qusb2: Add support " Manu Gautam
2018-01-16 10:57 ` [PATCH v5 10/17] phy: qcom-qmp: Move register offsets to header file Manu Gautam
2018-01-16 10:57 ` [PATCH v5 11/17] phy: qcom-qmp: Add register offsets for QMP V3 PHY Manu Gautam
2018-01-16 10:57 ` [PATCH v5 12/17] dt-bindings: phy-qcom-qmp: Update bindings for QMP V3 USB PHY Manu Gautam
2018-01-16 10:57 ` [PATCH v5 13/17] phy: qcom-qmp: Add support for QMP V3 USB3 PHY Manu Gautam
2018-01-16 10:57 ` [PATCH v5 14/17] phy: Add USB speed related PHY modes Manu Gautam
2018-01-16 10:57 ` [PATCH v5 15/17] phy: qcom-qusb2: Add support for runtime PM Manu Gautam
2018-01-16 10:57 ` [PATCH v5 16/17] phy: qcom-qmp: " Manu Gautam
2018-01-16 10:57 ` [PATCH v5 17/17] phy: add SPDX identifier to QMP and QUSB2 PHY drivers Manu Gautam

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