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From: Manu Gautam <mgautam@codeaurora.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org,
	Manu Gautam <mgautam@codeaurora.org>,
	Vivek Gautam <vivek.gautam@codeaurora.org>,
	Varadarajan Narayanan <varada@codeaurora.org>,
	smuthayy <smuthayy@codeaurora.org>,
	Fengguang Wu <fengguang.wu@intel.com>,
	Wei Yongjun <weiyongjun1@huawei.com>,
	linux-kernel@vger.kernel.org (open list:GENERIC PHY FRAMEWORK)
Subject: [PATCH v5 05/17] phy: qcom-qmp: Fix PHY block reset sequence
Date: Tue, 16 Jan 2018 16:27:00 +0530	[thread overview]
Message-ID: <1516100232-18623-6-git-send-email-mgautam@codeaurora.org> (raw)
In-Reply-To: <1516100232-18623-1-git-send-email-mgautam@codeaurora.org>

PHY block or asynchronous reset requires signal
to be asserted before de-asserting. Driver is only
de-asserting signal which is already low, hence
reset operation is a no-op. Fix this by asserting
signal first. Also, resetting requires PHY clocks
to be turned ON only after reset is finished. Fix
that as well.

Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
---
 drivers/phy/qualcomm/phy-qcom-qmp.c | 28 +++++++++++++++++++---------
 1 file changed, 19 insertions(+), 9 deletions(-)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 1b82cea..ecff261 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -752,13 +752,16 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
 		goto err_reg_enable;
 	}
 
-	ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks);
-	if (ret) {
-		dev_err(qmp->dev, "failed to enable clks, err=%d\n", ret);
-		goto err_clk_enable;
+	for (i = 0; i < cfg->num_resets; i++) {
+		ret = reset_control_assert(qmp->resets[i]);
+		if (ret) {
+			dev_err(qmp->dev, "%s reset assert failed\n",
+				cfg->reset_list[i]);
+			goto err_rst_assert;
+		}
 	}
 
-	for (i = 0; i < cfg->num_resets; i++) {
+	for (i = cfg->num_resets - 1; i >= 0; i--) {
 		ret = reset_control_deassert(qmp->resets[i]);
 		if (ret) {
 			dev_err(qmp->dev, "%s reset deassert failed\n",
@@ -767,6 +770,12 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
 		}
 	}
 
+	ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks);
+	if (ret) {
+		dev_err(qmp->dev, "failed to enable clks, err=%d\n", ret);
+		goto err_rst;
+	}
+
 	if (cfg->has_phy_com_ctrl)
 		qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],
 			     SW_PWRDN);
@@ -791,7 +800,7 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
 		if (ret) {
 			dev_err(qmp->dev,
 				"phy common block init timed-out\n");
-			goto err_rst;
+			goto err_com_init;
 		}
 	}
 
@@ -799,11 +808,12 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
 
 	return 0;
 
+err_com_init:
+	clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
 err_rst:
-	while (--i >= 0)
+	while (++i < cfg->num_resets)
 		reset_control_assert(qmp->resets[i]);
-	clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
-err_clk_enable:
+err_rst_assert:
 	regulator_bulk_disable(cfg->num_vregs, qmp->vregs);
 err_reg_enable:
 	mutex_unlock(&qmp->phy_mutex);
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

  parent reply	other threads:[~2018-01-16 11:02 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1516100232-18623-1-git-send-email-mgautam@codeaurora.org>
2018-01-16 10:56 ` [PATCH v5 01/17] phy: qcom-qmp: Fix phy pipe clock gating Manu Gautam
2018-01-16 10:56 ` [PATCH v5 02/17] phy: qcom-qmp: Adapt to clk_bulk_* APIs Manu Gautam
2018-01-16 10:56 ` [PATCH v5 03/17] phy: qcom-qmp: Power-on PHY before initialization Manu Gautam
2018-01-16 10:56 ` [PATCH v5 04/17] phy: qcom-qusb2: " Manu Gautam
2018-01-16 10:57 ` Manu Gautam [this message]
2018-01-16 10:57 ` [PATCH v5 06/17] phy: qcom-qmp: Move SERDES/PCS START after PHY reset Manu Gautam
2018-01-16 10:57 ` [PATCH v5 07/17] phy: qcom-qusb2: Add support for different register layouts Manu Gautam
2018-01-16 10:57 ` [PATCH v5 08/17] dt-bindings: phy-qcom-qusb2: Update binding for QUSB2 V2 version Manu Gautam
2018-01-16 10:57 ` [PATCH v5 09/17] phy: qcom-qusb2: Add support " Manu Gautam
2018-01-16 10:57 ` [PATCH v5 10/17] phy: qcom-qmp: Move register offsets to header file Manu Gautam
2018-01-16 10:57 ` [PATCH v5 11/17] phy: qcom-qmp: Add register offsets for QMP V3 PHY Manu Gautam
2018-01-16 10:57 ` [PATCH v5 12/17] dt-bindings: phy-qcom-qmp: Update bindings for QMP V3 USB PHY Manu Gautam
2018-01-16 10:57 ` [PATCH v5 13/17] phy: qcom-qmp: Add support for QMP V3 USB3 PHY Manu Gautam
2018-01-16 10:57 ` [PATCH v5 14/17] phy: Add USB speed related PHY modes Manu Gautam
2018-01-16 10:57 ` [PATCH v5 15/17] phy: qcom-qusb2: Add support for runtime PM Manu Gautam
2018-01-16 10:57 ` [PATCH v5 16/17] phy: qcom-qmp: " Manu Gautam
2018-01-16 10:57 ` [PATCH v5 17/17] phy: add SPDX identifier to QMP and QUSB2 PHY drivers Manu Gautam

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