From: Manu Gautam <mgautam@codeaurora.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org,
Manu Gautam <mgautam@codeaurora.org>,
Vivek Gautam <vivek.gautam@codeaurora.org>,
Varadarajan Narayanan <varada@codeaurora.org>,
Jaehoon Chung <jh80.chung@samsung.com>,
Fengguang Wu <fengguang.wu@intel.com>,
Wei Yongjun <weiyongjun1@huawei.com>,
linux-kernel@vger.kernel.org (open list:GENERIC PHY FRAMEWORK)
Subject: [PATCH v5 06/17] phy: qcom-qmp: Move SERDES/PCS START after PHY reset
Date: Tue, 16 Jan 2018 16:27:01 +0530 [thread overview]
Message-ID: <1516100232-18623-7-git-send-email-mgautam@codeaurora.org> (raw)
In-Reply-To: <1516100232-18623-1-git-send-email-mgautam@codeaurora.org>
Driver is currently performing PHY reset after starting
SERDES/PCS. As per hardware datasheet reset must be done
before starting PHY. Hence, update the sequence.
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index ecff261..edb6bbe 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -896,12 +896,12 @@ static int qcom_qmp_phy_init(struct phy *phy)
if (cfg->has_pwrdn_delay)
usleep_range(cfg->pwrdn_delay_min, cfg->pwrdn_delay_max);
- /* start SerDes and Phy-Coding-Sublayer */
- qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
-
/* Pull PHY out of reset state */
qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
+ /* start SerDes and Phy-Coding-Sublayer */
+ qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
+
status = pcs + cfg->regs[QPHY_PCS_READY_STATUS];
mask = cfg->mask_pcs_ready;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2018-01-16 10:58 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1516100232-18623-1-git-send-email-mgautam@codeaurora.org>
2018-01-16 10:56 ` [PATCH v5 01/17] phy: qcom-qmp: Fix phy pipe clock gating Manu Gautam
2018-01-16 10:56 ` [PATCH v5 02/17] phy: qcom-qmp: Adapt to clk_bulk_* APIs Manu Gautam
2018-01-16 10:56 ` [PATCH v5 03/17] phy: qcom-qmp: Power-on PHY before initialization Manu Gautam
2018-01-16 10:56 ` [PATCH v5 04/17] phy: qcom-qusb2: " Manu Gautam
2018-01-16 10:57 ` [PATCH v5 05/17] phy: qcom-qmp: Fix PHY block reset sequence Manu Gautam
2018-01-16 10:57 ` Manu Gautam [this message]
2018-01-16 10:57 ` [PATCH v5 07/17] phy: qcom-qusb2: Add support for different register layouts Manu Gautam
2018-01-16 10:57 ` [PATCH v5 08/17] dt-bindings: phy-qcom-qusb2: Update binding for QUSB2 V2 version Manu Gautam
2018-01-16 10:57 ` [PATCH v5 09/17] phy: qcom-qusb2: Add support " Manu Gautam
2018-01-16 10:57 ` [PATCH v5 10/17] phy: qcom-qmp: Move register offsets to header file Manu Gautam
2018-01-16 10:57 ` [PATCH v5 11/17] phy: qcom-qmp: Add register offsets for QMP V3 PHY Manu Gautam
2018-01-16 10:57 ` [PATCH v5 12/17] dt-bindings: phy-qcom-qmp: Update bindings for QMP V3 USB PHY Manu Gautam
2018-01-16 10:57 ` [PATCH v5 13/17] phy: qcom-qmp: Add support for QMP V3 USB3 PHY Manu Gautam
2018-01-16 10:57 ` [PATCH v5 14/17] phy: Add USB speed related PHY modes Manu Gautam
2018-01-16 10:57 ` [PATCH v5 15/17] phy: qcom-qusb2: Add support for runtime PM Manu Gautam
2018-01-16 10:57 ` [PATCH v5 16/17] phy: qcom-qmp: " Manu Gautam
2018-01-16 10:57 ` [PATCH v5 17/17] phy: add SPDX identifier to QMP and QUSB2 PHY drivers Manu Gautam
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