* Re: [RESEND PATCH 2/2] perf/x86/intel/uncore: Fix SBOX support for Broadwell CPUs
2018-03-23 13:11 ` [RESEND PATCH 2/2] perf/x86/intel/uncore: Fix SBOX support for Broadwell CPUs Kan Liang
@ 2018-04-19 19:10 ` Stephane Eranian
2018-04-20 10:29 ` Peter Zijlstra
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Stephane Eranian @ 2018-04-19 19:10 UTC (permalink / raw)
To: Liang, Kan
Cc: Peter Zijlstra, Thomas Gleixner, Ingo Molnar, LKML, Oskar Senft,
mark, Andi Kleen
On Fri, Mar 23, 2018 at 6:12 AM Kan Liang <kan.liang@linux.intel.com> wrote:
> From: Oskar Senft <osk@google.com>
> This fixes SBOX support for Broadwell CPUs by checking the Power Control
> Unit CAPID4 register to determine the number of available SBOXes on the
> particular CPU before trying to enable them.
> Signed-off-by: Oskar Senft <osk@google.com>
> Tested-by: Mark van Dijk <mark@voidzero.net>
> Reviewed-by: Kan Liang <kan.liang@intel.com>
Could you please merge this change?
Thanks.
> ---
> arch/x86/events/intel/uncore_snbep.c | 17 ++++++++++++++++-
> 1 file changed, 16 insertions(+), 1 deletion(-)
> diff --git a/arch/x86/events/intel/uncore_snbep.c
b/arch/x86/events/intel/uncore_snbep.c
> index 47c6910..715eb14 100644
> --- a/arch/x86/events/intel/uncore_snbep.c
> +++ b/arch/x86/events/intel/uncore_snbep.c
> @@ -3060,6 +3060,8 @@ static struct event_constraint
bdx_uncore_pcu_constraints[] = {
> void bdx_uncore_cpu_init(void)
> {
> + int pkg = topology_phys_to_logical_pkg(0);
> +
> if (bdx_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores)
> bdx_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores;
> uncore_msr_uncores = bdx_msr_uncores;
> @@ -3067,7 +3069,15 @@ void bdx_uncore_cpu_init(void)
> /* BDX-DE doesn't have SBOX */
> if (boot_cpu_data.x86_model == 86)
> uncore_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;
> -
> + /* Detect systems with no SBOXes */
> + else if (uncore_extra_pci_dev[pkg].dev[HSWEP_PCI_PCU_3]) {
> + u32 capid4;
> + pci_read_config_dword(
> + uncore_extra_pci_dev[pkg].dev[HSWEP_PCI_PCU_3],
> + 0x94, &capid4);
> + if (((capid4 >> 6) & 0x3) == 0)
> + bdx_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;
> + }
> hswep_uncore_pcu.constraints = bdx_uncore_pcu_constraints;
> }
> @@ -3285,6 +3295,11 @@ static const struct pci_device_id
bdx_uncore_pci_ids[] = {
> PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x6f46),
> .driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV,
2),
> },
> + { /* PCU.3 (for Capability registers) */
> + PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x6fc0),
> + .driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV,
> + HSWEP_PCI_PCU_3),
> + },
> { /* end: all zeroes */ }
> };
> --
> 2.4.11
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [RESEND PATCH 2/2] perf/x86/intel/uncore: Fix SBOX support for Broadwell CPUs
2018-03-23 13:11 ` [RESEND PATCH 2/2] perf/x86/intel/uncore: Fix SBOX support for Broadwell CPUs Kan Liang
2018-04-19 19:10 ` Stephane Eranian
@ 2018-04-20 10:29 ` Peter Zijlstra
2018-04-20 10:43 ` [tip:perf/urgent] " tip-bot for Oskar Senft
2018-04-20 11:22 ` tip-bot for Oskar Senft
3 siblings, 0 replies; 7+ messages in thread
From: Peter Zijlstra @ 2018-04-20 10:29 UTC (permalink / raw)
To: Kan Liang; +Cc: tglx, mingo, linux-kernel, eranian, osk, mark, ak
On Fri, Mar 23, 2018 at 09:11:30AM -0400, Kan Liang wrote:
> @@ -3067,7 +3069,15 @@ void bdx_uncore_cpu_init(void)
> /* BDX-DE doesn't have SBOX */
> if (boot_cpu_data.x86_model == 86)
> uncore_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;
> -
> + /* Detect systems with no SBOXes */
That really wants { }.
> + else if (uncore_extra_pci_dev[pkg].dev[HSWEP_PCI_PCU_3]) {
> + u32 capid4;
> + pci_read_config_dword(
> + uncore_extra_pci_dev[pkg].dev[HSWEP_PCI_PCU_3],
> + 0x94, &capid4);
> + if (((capid4 >> 6) & 0x3) == 0)
> + bdx_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;
> + }
> hswep_uncore_pcu.constraints = bdx_uncore_pcu_constraints;
> }
Otherwise these look fine to me;
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Thomas will you magic them into tip?
^ permalink raw reply [flat|nested] 7+ messages in thread* [tip:perf/urgent] perf/x86/intel/uncore: Fix SBOX support for Broadwell CPUs
2018-03-23 13:11 ` [RESEND PATCH 2/2] perf/x86/intel/uncore: Fix SBOX support for Broadwell CPUs Kan Liang
2018-04-19 19:10 ` Stephane Eranian
2018-04-20 10:29 ` Peter Zijlstra
@ 2018-04-20 10:43 ` tip-bot for Oskar Senft
2018-04-20 11:22 ` tip-bot for Oskar Senft
3 siblings, 0 replies; 7+ messages in thread
From: tip-bot for Oskar Senft @ 2018-04-20 10:43 UTC (permalink / raw)
To: linux-tip-commits
Cc: mingo, linux-kernel, hpa, osk, tglx, peterz, mark, kan.liang
Commit-ID: ca2f6779608e364443cd82d31b1efd8b76f23bf6
Gitweb: https://git.kernel.org/tip/ca2f6779608e364443cd82d31b1efd8b76f23bf6
Author: Oskar Senft <osk@google.com>
AuthorDate: Fri, 23 Mar 2018 09:11:30 -0400
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Fri, 20 Apr 2018 12:41:17 +0200
perf/x86/intel/uncore: Fix SBOX support for Broadwell CPUs
SBOX on some Broadwell CPUs is broken because it's enabled unconditionally
despite the fact that there are no SBOXes available.
Check the Power Control Unit CAPID4 register to determine the number of
available SBOXes on the particular CPU before trying to enable them. If
there are none, nullify the SBOX descriptor so it isn't tried to be
initialized.
Signed-off-by: Oskar Senft <osk@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Mark van Dijk <mark@voidzero.net>
Reviewed-by: Kan Liang <kan.liang@intel.com>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Cc: ak@linux.intel.com
Cc: peterz@infradead.org
Cc: eranian@google.com
Link: https://lkml.kernel.org/r/1521810690-2576-2-git-send-email-kan.liang@linux.intel.com
---
arch/x86/events/intel/uncore_snbep.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index 5bbbbee11879..37e809d457c6 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -3060,6 +3060,8 @@ static struct event_constraint bdx_uncore_pcu_constraints[] = {
void bdx_uncore_cpu_init(void)
{
+ int pkg = topology_phys_to_logical_pkg(0);
+
if (bdx_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores)
bdx_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores;
uncore_msr_uncores = bdx_msr_uncores;
@@ -3067,7 +3069,16 @@ void bdx_uncore_cpu_init(void)
/* BDX-DE doesn't have SBOX */
if (boot_cpu_data.x86_model == 86)
uncore_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;
+ /* Detect systems with no SBOXes */
+ else if (uncore_extra_pci_dev[pkg].dev[HSWEP_PCI_PCU_3]) {
+ struct pci_dev *pdev;
+ u32 capid4;
+ pdev = uncore_extra_pci_dev[pkg].dev[HSWEP_PCI_PCU_3];
+ pci_read_config_dword(pdev, 0x94, &capid4);
+ if (((capid4 >> 6) & 0x3) == 0)
+ bdx_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;
+ }
hswep_uncore_pcu.constraints = bdx_uncore_pcu_constraints;
}
@@ -3285,6 +3296,11 @@ static const struct pci_device_id bdx_uncore_pci_ids[] = {
PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x6f46),
.driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV, 2),
},
+ { /* PCU.3 (for Capability registers) */
+ PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x6fc0),
+ .driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV,
+ HSWEP_PCI_PCU_3),
+ },
{ /* end: all zeroes */ }
};
^ permalink raw reply [flat|nested] 7+ messages in thread* [tip:perf/urgent] perf/x86/intel/uncore: Fix SBOX support for Broadwell CPUs
2018-03-23 13:11 ` [RESEND PATCH 2/2] perf/x86/intel/uncore: Fix SBOX support for Broadwell CPUs Kan Liang
` (2 preceding siblings ...)
2018-04-20 10:43 ` [tip:perf/urgent] " tip-bot for Oskar Senft
@ 2018-04-20 11:22 ` tip-bot for Oskar Senft
3 siblings, 0 replies; 7+ messages in thread
From: tip-bot for Oskar Senft @ 2018-04-20 11:22 UTC (permalink / raw)
To: linux-tip-commits
Cc: tglx, peterz, osk, mingo, hpa, kan.liang, linux-kernel, mark
Commit-ID: 15a3e845b01ce2342cf187dc123c92c44c3c8170
Gitweb: https://git.kernel.org/tip/15a3e845b01ce2342cf187dc123c92c44c3c8170
Author: Oskar Senft <osk@google.com>
AuthorDate: Fri, 23 Mar 2018 09:11:30 -0400
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Fri, 20 Apr 2018 13:17:50 +0200
perf/x86/intel/uncore: Fix SBOX support for Broadwell CPUs
SBOX on some Broadwell CPUs is broken because it's enabled unconditionally
despite the fact that there are no SBOXes available.
Check the Power Control Unit CAPID4 register to determine the number of
available SBOXes on the particular CPU before trying to enable them. If
there are none, nullify the SBOX descriptor so it isn't tried to be
initialized.
Signed-off-by: Oskar Senft <osk@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Mark van Dijk <mark@voidzero.net>
Reviewed-by: Kan Liang <kan.liang@intel.com>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Cc: ak@linux.intel.com
Cc: peterz@infradead.org
Cc: eranian@google.com
Link: https://lkml.kernel.org/r/1521810690-2576-2-git-send-email-kan.liang@linux.intel.com
---
arch/x86/events/intel/uncore_snbep.c | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index 5bbbbee11879..77076a102e34 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -3060,14 +3060,25 @@ static struct event_constraint bdx_uncore_pcu_constraints[] = {
void bdx_uncore_cpu_init(void)
{
+ int pkg = topology_phys_to_logical_pkg(0);
+
if (bdx_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores)
bdx_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores;
uncore_msr_uncores = bdx_msr_uncores;
/* BDX-DE doesn't have SBOX */
- if (boot_cpu_data.x86_model == 86)
+ if (boot_cpu_data.x86_model == 86) {
uncore_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;
+ /* Detect systems with no SBOXes */
+ } else if (uncore_extra_pci_dev[pkg].dev[HSWEP_PCI_PCU_3]) {
+ struct pci_dev *pdev;
+ u32 capid4;
+ pdev = uncore_extra_pci_dev[pkg].dev[HSWEP_PCI_PCU_3];
+ pci_read_config_dword(pdev, 0x94, &capid4);
+ if (((capid4 >> 6) & 0x3) == 0)
+ bdx_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;
+ }
hswep_uncore_pcu.constraints = bdx_uncore_pcu_constraints;
}
@@ -3285,6 +3296,11 @@ static const struct pci_device_id bdx_uncore_pci_ids[] = {
PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x6f46),
.driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV, 2),
},
+ { /* PCU.3 (for Capability registers) */
+ PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x6fc0),
+ .driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV,
+ HSWEP_PCI_PCU_3),
+ },
{ /* end: all zeroes */ }
};
^ permalink raw reply [flat|nested] 7+ messages in thread