From: Luwei Kang <luwei.kang@intel.com>
To: kvm@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com,
x86@kernel.org, chao.p.peng@linux.intel.com,
thomas.lendacky@amd.com, bp@suse.de, Kan.liang@intel.com,
Janakarajan.Natarajan@amd.com, dwmw@amazon.co.uk,
linux-kernel@vger.kernel.org, alexander.shishkin@linux.intel.com,
peterz@infradead.org, mathieu.poirier@linaro.org,
kstewart@linuxfoundation.org, gregkh@linuxfoundation.org,
pbonzini@redhat.com, rkrcmar@redhat.com, david@redhat.com,
bsd@redhat.com, yu.c.zhang@linux.intel.com, joro@8bytes.org,
Luwei Kang <luwei.kang@intel.com>
Subject: [PATCH v9 11/12] KVM: x86: Set intercept for Intel PT MSRs read/write
Date: Tue, 22 May 2018 12:52:14 +0800 [thread overview]
Message-ID: <1526964735-16566-12-git-send-email-luwei.kang@intel.com> (raw)
In-Reply-To: <1526964735-16566-1-git-send-email-luwei.kang@intel.com>
From: Chao Peng <chao.p.peng@linux.intel.com>
Disable intercept Intel PT MSRs only when Intel PT is
enabled in guest. But MSR_IA32_RTIT_CTL will alway be
intercept.
Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com>
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
---
arch/x86/kvm/vmx.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 770cb7c..a09157c 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -948,6 +948,7 @@ static bool nested_vmx_is_page_fault_vmexit(struct vmcs12 *vmcs12,
static void vmx_update_msr_bitmap(struct kvm_vcpu *vcpu);
static void __always_inline vmx_disable_intercept_for_msr(unsigned long *msr_bitmap,
u32 msr, int type);
+static void pt_set_intercept_for_msr(struct vcpu_vmx *vmx, bool flag);
static DEFINE_PER_CPU(struct vmcs *, vmxarea);
static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
@@ -3999,6 +4000,7 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
vmx_rtit_ctl_check(vcpu, data))
return 1;
vmcs_write64(GUEST_IA32_RTIT_CTL, data);
+ pt_set_intercept_for_msr(vmx, !(data & RTIT_CTL_TRACEEN));
vmx->pt_desc.guest.ctl = data;
break;
case MSR_IA32_RTIT_STATUS:
@@ -5820,6 +5822,27 @@ static void vmx_update_msr_bitmap(struct kvm_vcpu *vcpu)
vmx->msr_bitmap_mode = mode;
}
+static void pt_set_intercept_for_msr(struct vcpu_vmx *vmx, bool flag)
+{
+ unsigned long *msr_bitmap = vmx->vmcs01.msr_bitmap;
+ u32 i;
+
+ vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_RTIT_STATUS,
+ MSR_TYPE_RW, flag);
+ vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_RTIT_OUTPUT_BASE,
+ MSR_TYPE_RW, flag);
+ vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_RTIT_OUTPUT_MASK,
+ MSR_TYPE_RW, flag);
+ vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_RTIT_CR3_MATCH,
+ MSR_TYPE_RW, flag);
+ for (i = 0; i < vmx->pt_desc.addr_range; i++) {
+ vmx_set_intercept_for_msr(msr_bitmap,
+ MSR_IA32_RTIT_ADDR0_A + i * 2, MSR_TYPE_RW, flag);
+ vmx_set_intercept_for_msr(msr_bitmap,
+ MSR_IA32_RTIT_ADDR0_B + i * 2, MSR_TYPE_RW, flag);
+ }
+}
+
static bool vmx_get_enable_apicv(struct kvm_vcpu *vcpu)
{
return enable_apicv;
--
1.8.3.1
next prev parent reply other threads:[~2018-05-22 2:58 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-22 4:52 [PATCH v9 00/12] Intel Processor Trace virtualization enabling Luwei Kang
2018-05-22 4:52 ` [PATCH v9 01/12] perf/x86/intel/pt: Move Intel-PT MSRs bit definitions to a public header Luwei Kang
2018-06-07 6:50 ` Kang, Luwei
2018-06-07 11:21 ` Paolo Bonzini
2018-05-22 4:52 ` [PATCH v9 02/12] perf/x86/intel/pt: Change pt_cap_get() to a public function Luwei Kang
2018-05-22 4:52 ` [PATCH v9 03/12] perf/x86/intel/pt: Add new bit definitions for Intel PT MSRs Luwei Kang
2018-06-07 13:33 ` Alexander Shishkin
2018-06-08 14:26 ` Kang, Luwei
2018-05-22 4:52 ` [PATCH v9 04/12] perf/x86/intel/pt: add new capability for Intel PT Luwei Kang
2018-06-07 13:40 ` Alexander Shishkin
2018-06-07 13:51 ` Peter Zijlstra
2018-06-08 14:37 ` Kang, Luwei
2018-06-08 14:34 ` Kang, Luwei
2018-05-22 4:52 ` [PATCH v9 05/12] perf/x86/intel/pt: Introduce a new function to get capability of " Luwei Kang
2018-05-22 4:52 ` [PATCH v9 06/12] KVM: x86: Add Intel Processor Trace virtualization mode Luwei Kang
2018-06-07 13:26 ` Alexander Shishkin
2018-06-08 14:19 ` Kang, Luwei
2018-06-11 11:39 ` Paolo Bonzini
2018-05-22 4:52 ` [PATCH v9 07/12] KVM: x86: Add Intel Processor Trace cpuid emulation Luwei Kang
2018-05-22 4:52 ` [PATCH v9 08/12] KVM: x86: Add Intel Processor Trace context switch for each vcpu Luwei Kang
2018-05-22 4:52 ` [PATCH v9 09/12] KVM: x86: Introduce a function to initialize the PT configuration Luwei Kang
2018-06-07 13:56 ` Alexander Shishkin
2018-06-08 14:56 ` Kang, Luwei
2018-06-11 11:41 ` Paolo Bonzini
2018-06-12 1:30 ` Kang, Luwei
2018-05-22 4:52 ` [PATCH v9 10/12] KVM: x86: Implement Intel Processor Trace MSRs read/write emulation Luwei Kang
2018-06-07 14:12 ` Alexander Shishkin
2018-06-08 15:12 ` Kang, Luwei
2018-05-22 4:52 ` Luwei Kang [this message]
2018-06-07 14:22 ` [PATCH v9 11/12] KVM: x86: Set intercept for Intel PT MSRs read/write Alexander Shishkin
2018-06-08 15:16 ` Kang, Luwei
2018-05-22 4:52 ` [PATCH v9 12/12] KVM: x86: Disable Intel Processor Trace when VMXON in L1 guest Luwei Kang
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