From: Paolo Bonzini <pbonzini@redhat.com>
To: "Kang, Luwei" <luwei.kang@intel.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"mingo@redhat.com" <mingo@redhat.com>,
"hpa@zytor.com" <hpa@zytor.com>,
"x86@kernel.org" <x86@kernel.org>,
"chao.p.peng@linux.intel.com" <chao.p.peng@linux.intel.com>,
"thomas.lendacky@amd.com" <thomas.lendacky@amd.com>,
"bp@suse.de" <bp@suse.de>, "Liang, Kan" <kan.liang@intel.com>,
"Janakarajan.Natarajan@amd.com" <Janakarajan.Natarajan@amd.com>,
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"david@redhat.com" <david@redhat.com>,
"bsd@redhat.com" <bsd@redhat.com>,
"yu.c.zhang@linux.intel.com" <yu.c.zhang@linux.intel.com>,
"joro@8bytes.org" <joro@8bytes.org>
Subject: Re: [PATCH v9 09/12] KVM: x86: Introduce a function to initialize the PT configuration
Date: Mon, 11 Jun 2018 13:41:53 +0200 [thread overview]
Message-ID: <c3a25e58-cb4e-f3f7-bbd5-559bc763bb26@redhat.com> (raw)
In-Reply-To: <82D7661F83C1A047AF7DC287873BF1E167FF0140@SHSMSX101.ccr.corp.intel.com>
On 08/06/2018 16:56, Kang, Luwei wrote:
>>> + /* Initialize and clear the no dependency bits */
>>> + vmx->pt_desc.ctl_bitmask = ~0ULL;
>> This looks redundant, doesn't it?
> This is a bit mask for RTIT_CTL MSR and it will make & with the value of RTIT_CLT from guest.
> The reserved bits will be 1 in this bit mask and the setable bits are 0.
>
>>> + vmx->pt_desc.ctl_bitmask = ~(RTIT_CTL_TRACEEN | RTIT_CTL_OS |
>>> + RTIT_CTL_USR | RTIT_CTL_TSC_EN |
>> RTIT_CTL_DISRETC);
But it's set twice, so the first assignment is superfluous.
Paolo
next prev parent reply other threads:[~2018-06-11 11:42 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-22 4:52 [PATCH v9 00/12] Intel Processor Trace virtualization enabling Luwei Kang
2018-05-22 4:52 ` [PATCH v9 01/12] perf/x86/intel/pt: Move Intel-PT MSRs bit definitions to a public header Luwei Kang
2018-06-07 6:50 ` Kang, Luwei
2018-06-07 11:21 ` Paolo Bonzini
2018-05-22 4:52 ` [PATCH v9 02/12] perf/x86/intel/pt: Change pt_cap_get() to a public function Luwei Kang
2018-05-22 4:52 ` [PATCH v9 03/12] perf/x86/intel/pt: Add new bit definitions for Intel PT MSRs Luwei Kang
2018-06-07 13:33 ` Alexander Shishkin
2018-06-08 14:26 ` Kang, Luwei
2018-05-22 4:52 ` [PATCH v9 04/12] perf/x86/intel/pt: add new capability for Intel PT Luwei Kang
2018-06-07 13:40 ` Alexander Shishkin
2018-06-07 13:51 ` Peter Zijlstra
2018-06-08 14:37 ` Kang, Luwei
2018-06-08 14:34 ` Kang, Luwei
2018-05-22 4:52 ` [PATCH v9 05/12] perf/x86/intel/pt: Introduce a new function to get capability of " Luwei Kang
2018-05-22 4:52 ` [PATCH v9 06/12] KVM: x86: Add Intel Processor Trace virtualization mode Luwei Kang
2018-06-07 13:26 ` Alexander Shishkin
2018-06-08 14:19 ` Kang, Luwei
2018-06-11 11:39 ` Paolo Bonzini
2018-05-22 4:52 ` [PATCH v9 07/12] KVM: x86: Add Intel Processor Trace cpuid emulation Luwei Kang
2018-05-22 4:52 ` [PATCH v9 08/12] KVM: x86: Add Intel Processor Trace context switch for each vcpu Luwei Kang
2018-05-22 4:52 ` [PATCH v9 09/12] KVM: x86: Introduce a function to initialize the PT configuration Luwei Kang
2018-06-07 13:56 ` Alexander Shishkin
2018-06-08 14:56 ` Kang, Luwei
2018-06-11 11:41 ` Paolo Bonzini [this message]
2018-06-12 1:30 ` Kang, Luwei
2018-05-22 4:52 ` [PATCH v9 10/12] KVM: x86: Implement Intel Processor Trace MSRs read/write emulation Luwei Kang
2018-06-07 14:12 ` Alexander Shishkin
2018-06-08 15:12 ` Kang, Luwei
2018-05-22 4:52 ` [PATCH v9 11/12] KVM: x86: Set intercept for Intel PT MSRs read/write Luwei Kang
2018-06-07 14:22 ` Alexander Shishkin
2018-06-08 15:16 ` Kang, Luwei
2018-05-22 4:52 ` [PATCH v9 12/12] KVM: x86: Disable Intel Processor Trace when VMXON in L1 guest Luwei Kang
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