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From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: Andy Lutomirski <luto@kernel.org>,
	"H . Peter Anvin" <hpa@zytor.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@kernel.org>
Cc: Andi Kleen <ak@linux.intel.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Markus T Metzger <markus.t.metzger@intel.com>,
	"Ravi V . Shankar" <ravi.v.shankar@intel.com>,
	"Chang S . Bae" <chang.seok.bae@intel.com>,
	LKML <linux-kernel@vger.kernel.org>
Subject: [PATCH v2 5/8] x86/msr: write_rdtscp_aux() to use wrmsr_safe()
Date: Wed,  6 Jun 2018 09:23:16 -0700	[thread overview]
Message-ID: <1528302199-29619-6-git-send-email-chang.seok.bae@intel.com> (raw)
In-Reply-To: <1528302199-29619-1-git-send-email-chang.seok.bae@intel.com>

Using wrmsr_safe() can make code a bit simpler by removing
some condition check

Suggested-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/include/asm/msr.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 04addd6..09bec62 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -317,7 +317,7 @@ static inline int wrmsrl_safe(u32 msr, u64 val)
 
 #define write_tsc(low, high) wrmsr(MSR_IA32_TSC, (low), (high))
 
-#define write_rdtscp_aux(val) wrmsr(MSR_TSC_AUX, (val), 0)
+#define write_rdtscp_aux(val) wrmsr_safe(MSR_TSC_AUX, (val), 0)
 
 struct msr *msrs_alloc(void);
 void msrs_free(struct msr *msrs);
-- 
2.7.4

  parent reply	other threads:[~2018-06-06 16:23 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-06 16:23 [PATCH v2 0/8] x86: infrastructure to enable FSGSBASE Chang S. Bae
2018-06-06 16:23 ` [PATCH v2 1/8] x86/fsgsbase/64: Introduce FS/GS base helper functions Chang S. Bae
2018-06-06 16:23 ` [PATCH v2 2/8] x86/fsgsbase/64: Make ptrace read FS/GS base accurately Chang S. Bae
2018-06-06 16:23 ` [PATCH v2 3/8] x86/fsgsbase/64: Use FS/GS base helpers in core dump Chang S. Bae
2018-06-06 16:23 ` [PATCH v2 4/8] x86/fsgsbase/64: Factor out load FS/GS segments from __switch_to Chang S. Bae
2018-06-06 16:23 ` Chang S. Bae [this message]
2018-06-06 17:11   ` [PATCH v2 5/8] x86/msr: write_rdtscp_aux() to use wrmsr_safe() Andy Lutomirski
2018-06-06 16:23 ` [PATCH v2 6/8] x86/segments/64: Rename PER_CPU segment to CPU_NUMBER Chang S. Bae
2018-06-06 17:16   ` Andy Lutomirski
2018-06-06 16:23 ` [PATCH v2 7/8] x86/segments/32: Introduce CPU_NUMBER segment Chang S. Bae
2018-06-06 17:16   ` Andy Lutomirski
2018-06-06 19:07     ` Brian Gerst
2018-06-06 19:24       ` Andy Lutomirski
2018-06-06 22:53       ` hpa
2018-06-06 16:23 ` [PATCH v2 8/8] x86/vdso: Move out the CPU number store Chang S. Bae
2018-06-06 17:25   ` Andy Lutomirski
2018-06-06 18:27     ` Bae, Chang Seok
2018-06-06 22:59       ` Bae, Chang Seok

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