From: "LH.Kuo" <lhjeff911@gmail.com>
To: p.zabel@pengutronix.de, broonie@kernel.org, robh+dt@kernel.org,
linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: dvorkin@tibbo.com, qinjian@cqplus1.com, wells.lu@sunplus.com,
"LH.Kuo" <lh.kuo@sunplus.com>
Subject: [PATCH 2/2] devicetree bindings SPI Add bindings doc for Sunplus SP7021
Date: Mon, 1 Nov 2021 14:18:45 +0800 [thread overview]
Message-ID: <1635747525-31243-3-git-send-email-lh.kuo@sunplus.com> (raw)
In-Reply-To: <1635747525-31243-1-git-send-email-lh.kuo@sunplus.com>
Add devicetree bindings SPI Add bindings doc for Sunplus SP7021
Signed-off-by: LH.Kuo <lh.kuo@sunplus.com>
---
.../bindings/spi/spi-sunplus-sp7021.yaml | 95 ++++++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 96 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml
diff --git a/Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml b/Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml
new file mode 100644
index 0000000..3ce90db
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml
@@ -0,0 +1,95 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright (C) Sunplus Co., Ltd. 2021
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/spi-sunplus-sp7021.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sunplus sp7021 SPI controller
+
+allOf:
+ - $ref: "spi-controller.yaml"
+
+maintainers:
+ - lh.kuo <lh.kuo@sunplus.com>
+
+properties:
+ compatible:
+ enum:
+ - sunplus,sp7021-spi-controller
+
+ reg:
+ items:
+ - description: Base address and length of the SPI master registers
+ - description: Base address and length of the SPI slave registers
+
+ reg-names:
+ items:
+ - const: spi_master
+ - const: spi_slave
+
+ interrupt-names:
+ items:
+ - const: dma_w_intr
+ - const: mas_risc_intr
+ - const: slave_risc_intr
+
+ interrupts:
+ minItems: 3
+
+ clocks:
+ maxItems: 1
+
+ clocks-names:
+ items:
+ - const: sys_pll
+
+ resets:
+ maxItems: 1
+
+ pinctrl-names:
+ description:
+ A pinctrl state named "default" must be defined.
+ const: default
+
+ pinctrl-0:
+ description:
+ A phandle to the default pinctrl state.
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clocks-names
+ - resets
+ - pinctrl-names
+ - pinctrl-0
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/sp-sp7021.h>
+ #include <dt-bindings/reset/sp-sp7021.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ spi_controller0: spi@9C002D80 {
+ compatible = "sunplus,sp7021-spi-controller";
+ reg = <0x9C002D80 0x80>, <0x9C002E00 0x80>;
+ reg-names = "spi_master", "spi_slave";
+ interrupt-parent = <&intc>;
+ interrupt-names = "dma_w_intr",
+ "mas_risc_intr",
+ "slave_risc_intr";
+ interrupts = <144 IRQ_TYPE_LEVEL_HIGH>,
+ <146 IRQ_TYPE_LEVEL_HIGH>,
+ <145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc SPI_COMBO_0>;
+ clocks-names = "sys_pll";
+ resets = <&rstc RST_SPI_COMBO_0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_spi0>;
+ };
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index f00c466..f6cf9d8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17949,6 +17949,7 @@ SUNPLUS SPI CONTROLLER INTERFACE DRIVER
M: LH Kuo <lh.kuo@sunplus.com>
L: sdricohcs-devel@lists.sourceforge.net (subscribers-only)
S: Maintained
+F: Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml
F: drivers/spi/spi-sunplus-sp7021.c
SUPERH
--
2.7.4
next prev parent reply other threads:[~2021-11-01 6:19 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-01 6:18 [PATCH 0/2] Add SPI control driver for Sunplus SP7021 SoC LH.Kuo
2021-11-01 6:18 ` [PATCH 1/2] SPI: Add SPI driver for Sunplus SP7021 LH.Kuo
2021-11-01 18:36 ` Mark Brown
[not found] ` <1c5b8e435d614772a5c0af8d5c633941@sphcmbx02.sunplus.com.tw>
2021-11-05 13:29 ` Mark Brown
2021-11-10 16:46 ` Andy Shevchenko
2021-11-02 14:31 ` Philipp Zabel
2021-11-14 8:02 ` Lukas Wunner
2021-11-01 6:18 ` LH.Kuo [this message]
2021-11-09 9:01 ` [PATCH v2 0/2] Add SPI control driver for Sunplus SP7021 SoC LH.Kuo
2021-11-09 9:01 ` [PATCH v2 1/2] SPI: Add SPI driver for Sunplus SP7021 LH.Kuo
2021-11-09 14:56 ` Mark Brown
[not found] ` <f98b5548cf564093af1d10ba1239507d@sphcmbx02.sunplus.com.tw>
2021-11-10 16:22 ` Mark Brown
[not found] ` <70a9c10ef34e46c2a51f134829abdd08@sphcmbx02.sunplus.com.tw>
2021-11-11 13:41 ` Mark Brown
[not found] ` <083dc70e20964ec8b74f71f6817be55e@sphcmbx02.sunplus.com.tw>
2021-11-18 13:38 ` Mark Brown
[not found] ` <e98c0bc4dc99415099197688a8dd3ef5@sphcmbx02.sunplus.com.tw>
2021-11-19 13:06 ` Mark Brown
2021-11-09 16:55 ` Randy Dunlap
[not found] ` <de7535b134fb4247b5275c04fa21debf@sphcmbx02.sunplus.com.tw>
2021-11-10 5:41 ` Randy Dunlap
2021-11-09 9:01 ` [PATCH v2 2/2] devicetree bindings SPI Add bindings doc " LH.Kuo
2021-11-09 14:57 ` Mark Brown
[not found] ` <2eeae9b780e94ac9810ffffe249098f2@sphcmbx02.sunplus.com.tw>
2021-11-10 14:11 ` Mark Brown
2021-11-22 2:33 ` [PATCH v3 0/2] Add SPI control driver for Sunplus SP7021 SoC LH.Kuo
2021-11-22 2:33 ` [PATCH v3 1/2] SPI: Add SPI driver for Sunplus SP7021 LH.Kuo
2021-11-22 22:09 ` Andy Shevchenko
2021-11-23 14:03 ` Mark Brown
2021-11-23 17:11 ` Andy Shevchenko
[not found] ` <6eb68a8153ba46c48862d00f7aa6e0fe@sphcmbx02.sunplus.com.tw>
2021-11-25 10:06 ` Andy Shevchenko
[not found] ` <33d50e94059b4734939db60b5c531bc9@sphcmbx02.sunplus.com.tw>
2021-11-26 10:33 ` Andy Shevchenko
2021-11-26 10:36 ` Philipp Zabel
2021-11-26 13:03 ` Mark Brown
[not found] ` <d33a3a4f3b8248a78fae572a7f88050a@sphcmbx02.sunplus.com.tw>
2021-11-29 13:10 ` Andy Shevchenko
[not found] ` <3d792085d6fc4be19253f5200c181041@sphcmbx02.sunplus.com.tw>
2021-12-01 19:28 ` Andy Shevchenko
2021-11-23 12:48 ` Lukas Wunner
2021-11-22 2:33 ` [PATCH v3 2/2] devicetree: bindings SPI Add bindings doc " LH.Kuo
2021-11-29 0:35 ` Rob Herring
2021-11-23 14:36 ` [PATCH v3 0/2] Add SPI control driver for Sunplus SP7021 SoC Mark Brown
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