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From: Mark Brown <broonie@kernel.org>
To: "Lh Kuo 郭力豪" <lh.Kuo@sunplus.com>
Cc: "LH.Kuo" <lhjeff911@gmail.com>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"dvorkin@tibbo.com" <dvorkin@tibbo.com>,
	"qinjian@cqplus1.com" <qinjian@cqplus1.com>,
	"Wells Lu 呂芳騰" <wells.lu@sunplus.com>
Subject: Re: [PATCH v2 1/2] SPI: Add SPI driver for Sunplus SP7021
Date: Thu, 11 Nov 2021 13:41:39 +0000	[thread overview]
Message-ID: <YY0dk26NqoOi2QEH@sirena.org.uk> (raw)
In-Reply-To: <70a9c10ef34e46c2a51f134829abdd08@sphcmbx02.sunplus.com.tw>

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On Thu, Nov 11, 2021 at 08:32:39AM +0000, Lh Kuo 郭力豪 wrote:

Please fix your mail client to word wrap within paragraphs at something
substantially less than 80 columns.  Doing this makes your messages much
easier to read and reply to.

> #define SPI_CS_HIGH   0x04 /* chipselect active high? */
> Is it mean?
> CASE1 : standby, CS high => start transfer CS become low => transfer end CS become high and standby
> CASE2 : standby, CS low => start transfer CS become high => transfer end CS become low and standby

> I think SPI_CS_HIGH means CASE2, But it is strange that more chipset work in CASE1 but drivers set SPI_CS_HIGH as defined.

SPI_CS_HIGH is case 2.

> 2. And in the CASE1 I should set 
> cs_gpios = 	<gpio 3 2 GPIO_ACTIVE_LOW>,
> or
> cs_gpios = 	<gpio 3 2 GPIO_ACTIVE_HIGH>,

_ACTIVE_HIGH if _CS_HIGH is specified, though the binding will try to
sort things out either way.

> 3. If I did not set the max_transfer_size of spi_control
> And use transfer_one set max_transfer_size and use_gpio_descriptors
> Can it transmit data that exceeds FIFO max bytes (even exceed HW's one-time transfer) in one transmission activity?

Yes, if you don't set a maximum transfer size the driver might get any
transfer size.  If you set a maximum transfer size then the driver will
not see any transfers that exceed the maximum transfer size.

> This is my concern, so I use Transfer_One_message

I can't understand how that would follow on.  If there's a limit on the
size of an individual transfer then tell the framework about that limit,
that's all that needs doing.  Why would it be preferable to not tell the
core about the limit and instead open code things?

*Please* think about the lengthy explanation I provided in my last
message about putting things that are not device specific in the
framework not the driver.

> Ex : Need to transmit 4000 bytes. 
>   Then I set Ctlr->transfer_one and use_gpio_descriptors
>     ctlr->max_transfer_size = 255;
>     The CS of device is low active

>    When the transmission starts, I can see the signal gpio-CS changes from high to low
> Ctlr->transfer_one will be triggered to execute 16 times, and transfer end gpio-CS changes from low to high.

This is exactly what will happen if you do as has been repeatedly
suggested.  Set a maximum *transfer* (not message) size, let the core
handle the chip select GPIO and implement transfer_one().

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  parent reply	other threads:[~2021-11-11 13:41 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-01  6:18 [PATCH 0/2] Add SPI control driver for Sunplus SP7021 SoC LH.Kuo
2021-11-01  6:18 ` [PATCH 1/2] SPI: Add SPI driver for Sunplus SP7021 LH.Kuo
2021-11-01 18:36   ` Mark Brown
     [not found]     ` <1c5b8e435d614772a5c0af8d5c633941@sphcmbx02.sunplus.com.tw>
2021-11-05 13:29       ` Mark Brown
2021-11-10 16:46     ` Andy Shevchenko
2021-11-02 14:31   ` Philipp Zabel
2021-11-14  8:02   ` Lukas Wunner
2021-11-01  6:18 ` [PATCH 2/2] devicetree bindings SPI Add bindings doc " LH.Kuo
2021-11-09  9:01 ` [PATCH v2 0/2] Add SPI control driver for Sunplus SP7021 SoC LH.Kuo
2021-11-09  9:01   ` [PATCH v2 1/2] SPI: Add SPI driver for Sunplus SP7021 LH.Kuo
2021-11-09 14:56     ` Mark Brown
     [not found]       ` <f98b5548cf564093af1d10ba1239507d@sphcmbx02.sunplus.com.tw>
2021-11-10 16:22         ` Mark Brown
     [not found]           ` <70a9c10ef34e46c2a51f134829abdd08@sphcmbx02.sunplus.com.tw>
2021-11-11 13:41             ` Mark Brown [this message]
     [not found]               ` <083dc70e20964ec8b74f71f6817be55e@sphcmbx02.sunplus.com.tw>
2021-11-18 13:38                 ` Mark Brown
     [not found]                   ` <e98c0bc4dc99415099197688a8dd3ef5@sphcmbx02.sunplus.com.tw>
2021-11-19 13:06                     ` Mark Brown
2021-11-09 16:55     ` Randy Dunlap
     [not found]       ` <de7535b134fb4247b5275c04fa21debf@sphcmbx02.sunplus.com.tw>
2021-11-10  5:41         ` Randy Dunlap
2021-11-09  9:01   ` [PATCH v2 2/2] devicetree bindings SPI Add bindings doc " LH.Kuo
2021-11-09 14:57     ` Mark Brown
     [not found]       ` <2eeae9b780e94ac9810ffffe249098f2@sphcmbx02.sunplus.com.tw>
2021-11-10 14:11         ` Mark Brown
2021-11-22  2:33 ` [PATCH v3 0/2] Add SPI control driver for Sunplus SP7021 SoC LH.Kuo
2021-11-22  2:33   ` [PATCH v3 1/2] SPI: Add SPI driver for Sunplus SP7021 LH.Kuo
2021-11-22 22:09     ` Andy Shevchenko
2021-11-23 14:03       ` Mark Brown
2021-11-23 17:11         ` Andy Shevchenko
     [not found]           ` <6eb68a8153ba46c48862d00f7aa6e0fe@sphcmbx02.sunplus.com.tw>
2021-11-25 10:06             ` Andy Shevchenko
     [not found]               ` <33d50e94059b4734939db60b5c531bc9@sphcmbx02.sunplus.com.tw>
2021-11-26 10:33                 ` Andy Shevchenko
2021-11-26 10:36                 ` Philipp Zabel
2021-11-26 13:03                   ` Mark Brown
     [not found]                     ` <d33a3a4f3b8248a78fae572a7f88050a@sphcmbx02.sunplus.com.tw>
2021-11-29 13:10                       ` Andy Shevchenko
     [not found]                         ` <3d792085d6fc4be19253f5200c181041@sphcmbx02.sunplus.com.tw>
2021-12-01 19:28                           ` Andy Shevchenko
2021-11-23 12:48     ` Lukas Wunner
2021-11-22  2:33   ` [PATCH v3 2/2] devicetree: bindings SPI Add bindings doc " LH.Kuo
2021-11-29  0:35     ` Rob Herring
2021-11-23 14:36   ` [PATCH v3 0/2] Add SPI control driver for Sunplus SP7021 SoC Mark Brown

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