[PATCH][PPC64] Don't clear MSR.RI in do_hash_page_DSI

[PATCH][PPC64] Don't clear MSR.RI in do_hash_page_DSI

[Paul Mackerras]

Some code that is used on iSeries (do_hash_page_DSI in head.S) was
clearing the RI (recoverable interrupt) bit in the MSR when it
shouldn't.  We were getting SLB miss interrupts following that which
were panicking because they appeared to have occurred at a bad place.
This patch fixes the problem.

Please apply.

Thanks,
Paul.

diff -puN arch/ppc64/kernel/head.S~ibm-ppc64-hash-page-ri arch/ppc64/kernel/head.S
--- forakpm/arch/ppc64/kernel/head.S~ibm-ppc64-hash-page-ri	2004-05-24 15:14:13.809492931 +1000
+++ forakpm-anton/arch/ppc64/kernel/head.S	2004-05-24 15:14:13.816492844 +1000
@@ -946,7 +946,7 @@ _GLOBAL(do_hash_page_DSI)
 	 */
 	mfmsr	r0
 	li	r4,0
-	ori	r4,r4,MSR_EE+MSR_RI
+	ori	r4,r4,MSR_EE
 	andc	r0,r0,r4
 	mtmsrd	r0			/* Hard Disable, RI off */
 
Signed-off-by: Paul Mackerras <paulus@samba.org>

Re: [PATCH][PPC64] Don't clear MSR.RI in do_hash_page_DSI

[Linus Torvalds]

Ok,
 looks like somebody has bought into the sign-off procedure. Great.

Except that I (and my tools) expected for the "Signed-off-by:" line to go
into the comment section _before_ the patch (and after the "explanation")
and obviously didn't make that part very clear.

The reason for that is partly because that's how all the current source
control helper tools work by extracting the changeset comments (but that
could certainly be changed), but more importantly because with a large
patch, it's very very easy to overlook the sign-off at the end of the
patch.

I only noticed after I applied this, so now you didn't get the distinction 
of being the first changeset ever to have the sign-off thing recorded ;^)

.. and the race is on.

(Seriously, while nobody has actually complained about the suggested
rules, I don't think anybody should feel compelled to do the sign-off
before we've had more time to let people argue over it. People who feel 
comfortable with the suggestion are obviously encouraged to start asap, 
though).

		Linus


On Mon, 24 May 2004, Paul Mackerras wrote:
>
> Some code that is used on iSeries (do_hash_page_DSI in head.S) was
> clearing the RI (recoverable interrupt) bit in the MSR when it
> shouldn't.  We were getting SLB miss interrupts following that which
> were panicking because they appeared to have occurred at a bad place.
> This patch fixes the problem.
> 
> Please apply.
> 
> Thanks,
> Paul.
> 
> diff -puN arch/ppc64/kernel/head.S~ibm-ppc64-hash-page-ri arch/ppc64/kernel/head.S
> --- forakpm/arch/ppc64/kernel/head.S~ibm-ppc64-hash-page-ri	2004-05-24 15:14:13.809492931 +1000
> +++ forakpm-anton/arch/ppc64/kernel/head.S	2004-05-24 15:14:13.816492844 +1000
> @@ -946,7 +946,7 @@ _GLOBAL(do_hash_page_DSI)
>  	 */
>  	mfmsr	r0
>  	li	r4,0
> -	ori	r4,r4,MSR_EE+MSR_RI
> +	ori	r4,r4,MSR_EE
>  	andc	r0,r0,r4
>  	mtmsrd	r0			/* Hard Disable, RI off */
>  
> Signed-off-by: Paul Mackerras <paulus@samba.org>
> 

[PATCH][PPC64] Don't clear MSR.RI in do_hash_page_DSI

[Paul Mackerras]

Some code that is used on iSeries (do_hash_page_DSI in head.S) was
clearing the RI (recoverable interrupt) bit in the MSR when it
shouldn't.  We were getting SLB miss interrupts following that which
were panicking because they appeared to have occurred at a bad place.
This patch fixes the problem.  In fact it isn't necessary for
do_hash_page_DSI to do anything to RI, so the patch changes the code
to not set or clear it.

Signed-off-by: Paul Mackerras <paulus@samba.org>

Please apply.

Thanks,
Paul.
diff -urN linux-2.5/arch/ppc64/kernel/head.S test25/arch/ppc64/kernel/head.S
--- linux-2.5/arch/ppc64/kernel/head.S	2004-06-04 07:19:00.000000000 +1000
+++ test25/arch/ppc64/kernel/head.S	2004-06-04 15:31:30.744946352 +1000
@@ -926,8 +926,8 @@
 	stb	r0,PACAPROCENABLED(r20)	/* Soft Disabled */
 
 	mfmsr	r0
-	ori	r0,r0,MSR_EE+MSR_RI
-	mtmsrd	r0			/* Hard Enable, RI on */
+	ori	r0,r0,MSR_EE
+	mtmsrd	r0,1			/* Hard Enable */
 #endif
 
 	/*
@@ -946,9 +946,9 @@
 	 */
 	mfmsr	r0
 	li	r4,0
-	ori	r4,r4,MSR_EE+MSR_RI
+	ori	r4,r4,MSR_EE
 	andc	r0,r0,r4
-	mtmsrd	r0			/* Hard Disable, RI off */
+	mtmsrd	r0,1			/* Hard Disable */
 
 	ld	r0,SOFTE(r1)
 	cmpdi	0,r0,0			/* See if we will soft enable in */