From: "Rob Herring (Arm)" <robh@kernel.org>
To: Varadarajan Narayanan <quic_varada@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
conor@kernel.org, linux-kernel@vger.kernel.org,
konradybcio@kernel.org, andersson@kernel.org, krzk+dt@kernel.org
Subject: Re: [PATCH v1 1/3] dt-bindings: cache: qcom,llcc: Add IPQ5424 compatible
Date: Mon, 4 Nov 2024 10:19:50 -0600 [thread overview]
Message-ID: <173073719041.380640.10202387939372853981.robh@kernel.org> (raw)
In-Reply-To: <20241104073840.3686674-2-quic_varada@quicinc.com>
On Mon, 04 Nov 2024 13:08:38 +0530, Varadarajan Narayanan wrote:
> Document the Last Level Cache Controller on IPQ5424. The
> 'broadcast' register space is present only in chipsets that have
> multiple instances of LLCC IP. Since IPQ5424 has only one
> instance, both the LLCC and LLCC_BROADCAST points to the same
> register space.
>
> Hence, allow only '1' reg & reg-names entry for IPQ5424.
>
> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> ---
> .../devicetree/bindings/cache/qcom,llcc.yaml | 20 +++++++++++++++++--
> 1 file changed, 18 insertions(+), 2 deletions(-)
>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
next prev parent reply other threads:[~2024-11-04 16:19 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-04 7:38 [PATCH v1 0/3] qcom: ipq5424: Add LLCC/system-cache-controller Varadarajan Narayanan
2024-11-04 7:38 ` [PATCH v1 1/3] dt-bindings: cache: qcom,llcc: Add IPQ5424 compatible Varadarajan Narayanan
2024-11-04 16:19 ` Rob Herring (Arm) [this message]
2024-11-04 7:38 ` [PATCH v1 2/3] soc: qcom: llcc: Update configuration data for IPQ5424 Varadarajan Narayanan
2024-11-04 11:04 ` Konrad Dybcio
2024-11-05 10:24 ` Varadarajan Narayanan
2024-11-04 7:38 ` [PATCH v1 3/3] arm64: dts: qcom: ipq5424: Add LLCC/system-cache-controller Varadarajan Narayanan
2024-11-04 11:06 ` Konrad Dybcio
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