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From: Varadarajan Narayanan <quic_varada@quicinc.com>
To: <andersson@kernel.org>, <konradybcio@kernel.org>,
	<conor@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
	<linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Cc: Varadarajan Narayanan <quic_varada@quicinc.com>
Subject: [PATCH v1 2/3] soc: qcom: llcc: Update configuration data for IPQ5424
Date: Mon, 4 Nov 2024 13:08:39 +0530	[thread overview]
Message-ID: <20241104073840.3686674-3-quic_varada@quicinc.com> (raw)
In-Reply-To: <20241104073840.3686674-1-quic_varada@quicinc.com>

The 'broadcast' register space is present only in chipsets that
have multiple instances of LLCC IP. Since IPQ5424 has only one
instance, both the LLCC and LLCC_BROADCAST points to the same
register space.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
---
 drivers/soc/qcom/llcc-qcom.c | 60 +++++++++++++++++++++++++++++++++---
 1 file changed, 56 insertions(+), 4 deletions(-)

diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
index a470285f54a8..51dba8ec2183 100644
--- a/drivers/soc/qcom/llcc-qcom.c
+++ b/drivers/soc/qcom/llcc-qcom.c
@@ -152,6 +152,38 @@ enum llcc_reg_offset {
 	LLCC_COMMON_STATUS0,
 };
 
+static const struct llcc_slice_config ipq5424_data[] =  {
+	{
+		.usecase_id = LLCC_CPUSS,
+		.slice_id = 1,
+		.max_cap = 768,
+		.priority = 1,
+		.bonus_ways = 0xFFFF,
+		.retain_on_pc = 1,
+		.activate_on_init = 1,
+		.write_scid_cacheable_en = 1,
+		.stale_en = 1,
+		.stale_cap_en = 1,
+		.alloc_oneway_en = 1,
+		.ovcap_en = 1,
+		.ovcap_prio = 1,
+		.vict_prio = 1,
+	},
+	{
+		.usecase_id = LLCC_VIDSC0,
+		.slice_id = 2,
+		.max_cap = 256,
+		.priority = 2,
+		.fixed_size = 1,
+		.bonus_ways = 0xF000,
+		.retain_on_pc = 1,
+		.activate_on_init = 1,
+		.write_scid_cacheable_en = 1,
+		.stale_en = 1,
+		.stale_cap_en = 1,
+	},
+};
+
 static const struct llcc_slice_config sa8775p_data[] =  {
 	{
 		.usecase_id = LLCC_CPUSS,
@@ -2677,6 +2709,16 @@ static const struct qcom_llcc_config qdu1000_cfg[] = {
 	},
 };
 
+static const struct qcom_llcc_config ipq5424_cfg[] = {
+	{
+		.sct_data       = ipq5424_data,
+		.size           = ARRAY_SIZE(ipq5424_data),
+		.need_llcc_cfg  = true,
+		.reg_offset     = llcc_v2_1_reg_offset,
+		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
+	},
+};
+
 static const struct qcom_llcc_config sa8775p_cfg[] = {
 	{
 		.sct_data	= sa8775p_data,
@@ -2834,6 +2876,11 @@ static const struct qcom_sct_config qdu1000_cfgs = {
 	.num_config	= ARRAY_SIZE(qdu1000_cfg),
 };
 
+static const struct qcom_sct_config ipq5424_cfgs = {
+	.llcc_config	= ipq5424_cfg,
+	.num_config	= ARRAY_SIZE(ipq5424_cfg),
+};
+
 static const struct qcom_sct_config sa8775p_cfgs = {
 	.llcc_config	= sa8775p_cfg,
 	.num_config	= ARRAY_SIZE(sa8775p_cfg),
@@ -3410,10 +3457,14 @@ static int qcom_llcc_probe(struct platform_device *pdev)
 		}
 	}
 
-	drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base");
-	if (IS_ERR(drv_data->bcast_regmap)) {
-		ret = PTR_ERR(drv_data->bcast_regmap);
-		goto err;
+	if (num_banks == 1) {
+		drv_data->bcast_regmap = regmap;
+	} else {
+		drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base");
+		if (IS_ERR(drv_data->bcast_regmap)) {
+			ret = PTR_ERR(drv_data->bcast_regmap);
+			goto err;
+		}
 	}
 
 	/* Extract version of the IP */
@@ -3485,6 +3536,7 @@ static int qcom_llcc_probe(struct platform_device *pdev)
 
 static const struct of_device_id qcom_llcc_of_match[] = {
 	{ .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs},
+	{ .compatible = "qcom,ipq5424-llcc", .data = &ipq5424_cfgs},
 	{ .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs },
 	{ .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs },
 	{ .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfgs },
-- 
2.34.1


  parent reply	other threads:[~2024-11-04  7:39 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-04  7:38 [PATCH v1 0/3] qcom: ipq5424: Add LLCC/system-cache-controller Varadarajan Narayanan
2024-11-04  7:38 ` [PATCH v1 1/3] dt-bindings: cache: qcom,llcc: Add IPQ5424 compatible Varadarajan Narayanan
2024-11-04 16:19   ` Rob Herring (Arm)
2024-11-04  7:38 ` Varadarajan Narayanan [this message]
2024-11-04 11:04   ` [PATCH v1 2/3] soc: qcom: llcc: Update configuration data for IPQ5424 Konrad Dybcio
2024-11-05 10:24     ` Varadarajan Narayanan
2024-11-04  7:38 ` [PATCH v1 3/3] arm64: dts: qcom: ipq5424: Add LLCC/system-cache-controller Varadarajan Narayanan
2024-11-04 11:06   ` Konrad Dybcio

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