From: Varadarajan Narayanan <quic_varada@quicinc.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Cc: <andersson@kernel.org>, <konradybcio@kernel.org>,
<conor@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
<linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v1 2/3] soc: qcom: llcc: Update configuration data for IPQ5424
Date: Tue, 5 Nov 2024 15:54:46 +0530 [thread overview]
Message-ID: <ZynybsCCp2uvggXA@hu-varada-blr.qualcomm.com> (raw)
In-Reply-To: <b69a8d94-6607-4345-ad9e-16ffd5dc119b@oss.qualcomm.com>
On Mon, Nov 04, 2024 at 12:04:52PM +0100, Konrad Dybcio wrote:
> On 4.11.2024 8:38 AM, Varadarajan Narayanan wrote:
> > The 'broadcast' register space is present only in chipsets that
> > have multiple instances of LLCC IP. Since IPQ5424 has only one
> > instance, both the LLCC and LLCC_BROADCAST points to the same
> > register space.
> >
> > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> > ---
>
> [...]
>
> > +static const struct llcc_slice_config ipq5424_data[] = {
> > + {
> > + .usecase_id = LLCC_CPUSS,
> > + .slice_id = 1,
> > + .max_cap = 768,
> > + .priority = 1,
> > + .bonus_ways = 0xFFFF,
> > + .retain_on_pc = 1,
> > + .activate_on_init = 1,
> > + .write_scid_cacheable_en = 1,
> > + .stale_en = 1,
> > + .stale_cap_en = 1,
> > + .alloc_oneway_en = 1,
> > + .ovcap_en = 1,
> > + .ovcap_prio = 1,
> > + .vict_prio = 1,
>
> Many of these are booleans, please use true/false values
>
> [...]
>
> >
> > - drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base");
> > - if (IS_ERR(drv_data->bcast_regmap)) {
> > - ret = PTR_ERR(drv_data->bcast_regmap);
> > - goto err;
> > + if (num_banks == 1) {
> > + drv_data->bcast_regmap = regmap;
> > + } else {
> > + drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base");
> > + if (IS_ERR(drv_data->bcast_regmap)) {
> > + ret = PTR_ERR(drv_data->bcast_regmap);
> > + goto err;
> > + }
> > }
>
> This won't work. See for example
>
> https://lore.kernel.org/linux-arm-msm/20241031-add_llcc_dts_node_for_qcs615-v2-1-205766a607ca@quicinc.com/
>
> Which has both just one bank and llcc_broadcase_base.
>
> You probably want to introduce a quirk like:
>
> if (IS_ERR(drv_data->bcast_regmap)) {
> if (cfg->no_broadcast_register)
> bcast_regmap = drv_data->regmaps[0];
> else {
> ret = PTR_ERR(drv_data->bcast_regmap);
> goto err;
> }
> }
Konrad,
Have posted v2 incorporating the above comments, please review.
Thanks
Varada
next prev parent reply other threads:[~2024-11-05 10:24 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-04 7:38 [PATCH v1 0/3] qcom: ipq5424: Add LLCC/system-cache-controller Varadarajan Narayanan
2024-11-04 7:38 ` [PATCH v1 1/3] dt-bindings: cache: qcom,llcc: Add IPQ5424 compatible Varadarajan Narayanan
2024-11-04 16:19 ` Rob Herring (Arm)
2024-11-04 7:38 ` [PATCH v1 2/3] soc: qcom: llcc: Update configuration data for IPQ5424 Varadarajan Narayanan
2024-11-04 11:04 ` Konrad Dybcio
2024-11-05 10:24 ` Varadarajan Narayanan [this message]
2024-11-04 7:38 ` [PATCH v1 3/3] arm64: dts: qcom: ipq5424: Add LLCC/system-cache-controller Varadarajan Narayanan
2024-11-04 11:06 ` Konrad Dybcio
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