* Re: [PATCH] riscv/futex: Optimize atomic cmpxchg
[not found] <20241113183321.491113-1-dave@stgolabs.net>
@ 2024-11-13 19:15 ` Andrea Parri
2025-01-30 14:10 ` patchwork-bot+linux-riscv
1 sibling, 0 replies; 2+ messages in thread
From: Andrea Parri @ 2024-11-13 19:15 UTC (permalink / raw)
To: Davidlohr Bueso
Cc: palmer, jimw, guoren, dlustig, boqun.feng, peterz, will,
linux-riscv, linux-kernel
On Wed, Nov 13, 2024 at 10:33:21AM -0800, Davidlohr Bueso wrote:
> Remove redundant release/acquire barriers, optimizing the lr/sc sequence
> to provide conditional RCsc synchronization, per the RVWMO.
>
> Signed-off-by: Davidlohr Bueso <dave@stgolabs.net>
> ---
> arch/riscv/include/asm/futex.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/futex.h b/arch/riscv/include/asm/futex.h
> index fc8130f995c1..72be100afa23 100644
> --- a/arch/riscv/include/asm/futex.h
> +++ b/arch/riscv/include/asm/futex.h
> @@ -85,7 +85,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
>
> __enable_user_access();
> __asm__ __volatile__ (
> - "1: lr.w.aqrl %[v],%[u] \n"
> + "1: lr.w %[v],%[u] \n"
> " bne %[v],%z[ov],3f \n"
> "2: sc.w.aqrl %[t],%z[nv],%[u] \n"
> " bnez %[t],1b \n"
atomic_cmpxchg() uses yet another scheme, but this does also look good
to me: FWIW,
Reviewed-by: Andrea Parri <parri.andrea@gmail.com>
Andrea
^ permalink raw reply [flat|nested] 2+ messages in thread* Re: [PATCH] riscv/futex: Optimize atomic cmpxchg
[not found] <20241113183321.491113-1-dave@stgolabs.net>
2024-11-13 19:15 ` [PATCH] riscv/futex: Optimize atomic cmpxchg Andrea Parri
@ 2025-01-30 14:10 ` patchwork-bot+linux-riscv
1 sibling, 0 replies; 2+ messages in thread
From: patchwork-bot+linux-riscv @ 2025-01-30 14:10 UTC (permalink / raw)
To: Davidlohr Bueso
Cc: linux-riscv, palmer, jimw, guoren, dlustig, parri.andrea,
boqun.feng, peterz, will, linux-kernel
Hello:
This patch was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:
On Wed, 13 Nov 2024 10:33:21 -0800 you wrote:
> Remove redundant release/acquire barriers, optimizing the lr/sc sequence
> to provide conditional RCsc synchronization, per the RVWMO.
>
> Signed-off-by: Davidlohr Bueso <dave@stgolabs.net>
> ---
> arch/riscv/include/asm/futex.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Here is the summary with links:
- riscv/futex: Optimize atomic cmpxchg
https://git.kernel.org/riscv/c/9d0593da9459
You are awesome, thank you!
--
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^ permalink raw reply [flat|nested] 2+ messages in thread