[tip: x86/cpu] tools/x86/kcpuid: Update bitfields to x86-cpuid-db v2.3

["tip-bot2 for Ahmed S. Darwish" <tip-bot2@linutronix.de>]

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID:     300ba891418ae72df8d16fc26886f1d049c70907
Gitweb:        https://git.kernel.org/tip/300ba891418ae72df8d16fc26886f1d049c70907
Author:        Ahmed S. Darwish <darwi@linutronix.de>
AuthorDate:    Mon, 24 Mar 2025 15:20:40 +01:00
Committer:     Ingo Molnar <mingo@kernel.org>
CommitterDate: Tue, 25 Mar 2025 09:53:47 +01:00

tools/x86/kcpuid: Update bitfields to x86-cpuid-db v2.3

Update kcpuid's CSV file to version 2.3, as generated by x86-cpuid-db.

Summary of the v2.3 changes:

* Per H. Peter Anvin's feedback, leaf 0x3 is not unique to Transmeta as
  the CSV file earlier claimed.  Since leaf 0x3's format differs between
  Intel and Transmeta, and the project does not yet support having the
  same CPUID bitfield with varying interpretations across vendors, leaf
  0x3 is removed for now.  Given that Intel discontinued support for PSN
  from Pentium 4 onward, and Linux force disables it on early boot for
  privacy concerns, this should have minimal impact.

* Leaf 0x80000021: Make bitfield IDs and descriptions coherent with each
  other.  Remove "_support" from bitfield IDs, as no other leaf has such
  convention.

Reported-by: "H. Peter Anvin" <hpa@zytor.com>
Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Link: https://gitlab.com/x86-cpuid.org/x86-cpuid-db/-/blob/v2.3/CHANGELOG.rst
Link: https://lore.kernel.org/r/20250324142042.29010-20-darwi@linutronix.de

Closes: https://lkml.kernel.org/r/C7684E03-36E0-4D58-B6F0-78F4DB82D737@zytor.com
---
 tools/arch/x86/kcpuid/cpuid.csv | 30 +++++++++++-------------------
 1 file changed, 11 insertions(+), 19 deletions(-)

diff --git a/tools/arch/x86/kcpuid/cpuid.csv b/tools/arch/x86/kcpuid/cpuid.csv
index 9613e09..8d25b0b 100644
--- a/tools/arch/x86/kcpuid/cpuid.csv
+++ b/tools/arch/x86/kcpuid/cpuid.csv
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: CC0-1.0
-# Generator: x86-cpuid-db v2.2
+# Generator: x86-cpuid-db v2.3
 
 #
 # Auto-generated file.
@@ -116,14 +116,6 @@
        0x2,         0,  edx,   30:24,    desc15                 , Descriptor #15
        0x2,         0,  edx,      31,    edx_invalid            , Descriptors 12-15 are invalid if set
 
-# Leaf 3H
-# Transmeta Processor Serial Number (PSN)
-
-       0x3,         0,  eax,    31:0,    cpu_psn_0              , Processor Serial Number bytes 0 - 3
-       0x3,         0,  ebx,    31:0,    cpu_psn_1              , Processor Serial Number bytes 4 - 7
-       0x3,         0,  ecx,    31:0,    cpu_psn_2              , Processor Serial Number bytes 8 - 11
-       0x3,         0,  edx,    31:0,    cpu_psn_3              , Processor Serial Number bytes 12 - 15
-
 # Leaf 4H
 # Intel deterministic cache parameters
 
@@ -1020,20 +1012,20 @@
 0x80000021,         0,  eax,       0,    no_nested_data_bp      , No nested data breakpoints
 0x80000021,         0,  eax,       1,    fsgs_non_serializing   , WRMSR to {FS,GS,KERNEL_GS}_BASE is non-serializing
 0x80000021,         0,  eax,       2,    lfence_rdtsc           , LFENCE always serializing / synchronizes RDTSC
-0x80000021,         0,  eax,       3,    smm_page_cfg_lock      , SMM paging configuration lock is supported
+0x80000021,         0,  eax,       3,    smm_page_cfg_lock      , SMM paging configuration lock
 0x80000021,         0,  eax,       6,    null_sel_clr_base      , Null selector clears base
-0x80000021,         0,  eax,       7,    upper_addr_ignore      , EFER MSR Upper Address Ignore Enable bit supported
-0x80000021,         0,  eax,       8,    autoibrs               , EFER MSR Automatic IBRS enable bit supported
-0x80000021,         0,  eax,       9,    no_smm_ctl_msr         , SMM_CTL MSR (0xc0010116) is not present
-0x80000021,         0,  eax,      10,    fsrs_supported         , Fast Short Rep STOSB (FSRS) is supported
-0x80000021,         0,  eax,      11,    fsrc_supported         , Fast Short Rep CMPSB (FSRC) is supported
-0x80000021,         0,  eax,      13,    prefetch_ctl_msr       , Prefetch control MSR is supported
+0x80000021,         0,  eax,       7,    upper_addr_ignore      , EFER MSR Upper Address Ignore
+0x80000021,         0,  eax,       8,    autoibrs               , EFER MSR Automatic IBRS
+0x80000021,         0,  eax,       9,    no_smm_ctl_msr         , SMM_CTL MSR (0xc0010116) is not available
+0x80000021,         0,  eax,      10,    fsrs                   , Fast Short Rep STOSB
+0x80000021,         0,  eax,      11,    fsrc                   , Fast Short Rep CMPSB
+0x80000021,         0,  eax,      13,    prefetch_ctl_msr       , Prefetch control MSR is available
 0x80000021,         0,  eax,      16,    opcode_reclaim         , Reserves opcode space
 0x80000021,         0,  eax,      17,    user_cpuid_disable     , #GP when executing CPUID at CPL > 0 is supported
-0x80000021,         0,  eax,      18,    epsf_supported         , Enhanced Predictive Store Forwarding (EPSF) is supported
+0x80000021,         0,  eax,      18,    epsf                   , Enhanced Predictive Store Forwarding
 0x80000021,         0,  eax,      22,    wl_feedback            , Workload-based heuristic feedback to OS
-0x80000021,         0,  eax,      24,    eraps_support          , Enhanced Return Address Predictor Security
-0x80000021,         0,  eax,      27,    sbpb                   , Support for the Selective Branch Predictor Barrier
+0x80000021,         0,  eax,      24,    eraps                  , Enhanced Return Address Predictor Security
+0x80000021,         0,  eax,      27,    sbpb                   , Selective Branch Predictor Barrier
 0x80000021,         0,  eax,      28,    ibpb_brtype            , Branch predictions flushed from CPU branch predictor
 0x80000021,         0,  eax,      29,    srso_no                , CPU is not subject to the SRSO vulnerability
 0x80000021,         0,  eax,      30,    srso_uk_no             , CPU is not vulnerable to SRSO at user-kernel boundary