[PATCH v2] irqchip/sifive-plic: Avoid signed shift in interrupt enable mask

[PATCH v2] irqchip/sifive-plic: Avoid signed shift in interrupt enable mask

[Pengpeng Hou]

__plic_toggle() builds a 32-bit interrupt enable mask using a signed
integer literal. A valid interrupt selecting bit 31 evaluates 1 << 31,
which shifts a signed int into its sign bit.

Use BIT(), matching the equivalent mask construction in plic_irq_eoi().
The resulting mask remains representable in u32 on both RV32 and RV64.

The issue was found by our static-analysis tool.

Fixes: 8237f8bc4f6e ("irqchip: add a SiFive PLIC driver")
Assisted-by: gpt 5
Signed-off-by: Pengpeng Hou <hppiscas@163.com>
---
Changes since v1: https://lore.kernel.org/r/20260825151000.1-plic-bit31-caplitmus-rv@iscas.ac.cn/
- Fix the Fixes tag as requested by Radu; keep the code change unchanged.
- Rebase on 518e5b794c06.

 drivers/irqchip/irq-sifive-plic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index 5b0dac1..d3d4187 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -108,7 +108,7 @@ static int plic_irq_set_type(struct irq_data *d, unsigned int type);
 static void __plic_toggle(struct plic_handler *handler, int hwirq, int enable)
 {
 	u32 __iomem *base = handler->enable_base;
-	u32 hwirq_mask = 1 << (hwirq % 32);
+	u32 hwirq_mask = BIT(hwirq % 32);
 	int group = hwirq / 32;
 	u32 value;
 

base-commit: 518e5b794c06c0f0eb40df3e202274a66202c137

Re: [PATCH v2] irqchip/sifive-plic: Avoid signed shift in interrupt enable mask

[Pengpeng Hou]

Hi Radu, Thomas,

A brief follow-up on this v2. It corrects the Fixes tag as requested,
with the code change unchanged.

Please let me know whether it is queued or if any further changes are
needed.

Thanks,
Pengpeng

[tip: irq/drivers] irqchip/sifive-plic: Avoid signed shift in interrupt enable mask

[tip-bot2 for Pengpeng Hou]

The following commit has been merged into the irq/drivers branch of tip:

Commit-ID:     0f214e5bbee59d5952d3c061fd65ed9a1e175981
Gitweb:        https://git.kernel.org/tip/0f214e5bbee59d5952d3c061fd65ed9a1e175981
Author:        Pengpeng Hou <hppiscas@163.com>
AuthorDate:    Sun, 20 Sep 2026 21:06:53 +08:00
Committer:     Thomas Gleixner <tglx@kernel.org>
CommitterDate: Thu, 15 Oct 2026 11:50:47 +02:00

irqchip/sifive-plic: Avoid signed shift in interrupt enable mask

__plic_toggle() builds a 32-bit interrupt enable mask using a signed
integer literal. A valid interrupt selecting bit 31 evaluates 1 << 31,
which shifts a signed int into its sign bit.

Use BIT(), matching the equivalent mask construction in plic_irq_eoi().
The resulting mask remains representable in u32 on both RV32 and RV64.

The issue was found by our static-analysis tool.

Fixes: 8237f8bc4f6e ("irqchip: add a SiFive PLIC driver")
Signed-off-by: Pengpeng Hou <hppiscas@163.com>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Assisted-by: gpt 5
Link: https://patch.msgid.link/caplitmus-rv.v2.plic.87a8fc444de44e109889ba28703c76f3@163.com
---
 drivers/irqchip/irq-sifive-plic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index 70a7478..4156493 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -108,7 +108,7 @@ static int plic_irq_set_type(struct irq_data *d, unsigned int type);
 static void __plic_toggle(struct plic_handler *handler, int hwirq, int enable)
 {
 	u32 __iomem *base = handler->enable_base;
-	u32 hwirq_mask = 1 << (hwirq % 32);
+	u32 hwirq_mask = BIT(hwirq % 32);
 	int group = hwirq / 32;
 	u32 value;
 

Re: [PATCH v2] irqchip/sifive-plic: Avoid signed shift in interrupt enable mask

[patchwork-bot+linux-riscv]

Hello:

This patch was applied to riscv/linux.git (fixes)
by Thomas Gleixner <tglx@kernel.org>:

On Sun, 20 Sep 2026 21:06:53 +0800 you wrote:
> __plic_toggle() builds a 32-bit interrupt enable mask using a signed
> integer literal. A valid interrupt selecting bit 31 evaluates 1 << 31,
> which shifts a signed int into its sign bit.
> 
> Use BIT(), matching the equivalent mask construction in plic_irq_eoi().
> The resulting mask remains representable in u32 on both RV32 and RV64.
> 
> [...]

Here is the summary with links:
  - [v2] irqchip/sifive-plic: Avoid signed shift in interrupt enable mask
    https://git.kernel.org/riscv/c/0f214e5bbee5

You are awesome, thank you!
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