[PATCH v3 0/3] Dongwoon DW9800K update patchset

[PATCH v3 0/3] Dongwoon DW9800K update patchset

[Griffin Kroah-Hartman]

This patchset edits the dw9800k driver and related files, to properly
match previously mismatched register writes, variables, and logic now
that we have the datasheet for the dongwoon dw98900k.

This is a breaking change, but is necessary to ensure proper bindings
and driver behavior. The previous naive approach did not ensure proper
functionality with different device tree properties.

Signed-off-by: Griffin Kroah-Hartman <griffin.kroah@fairphone.com>
---
Changes in v3:
- Added more detailed descriptions of the changes actually made
  to the driver.
- Reverted to using vcm-prescale attribute to avoid unneeded breaking
  with dtb.
- Link to v2: https://lore.kernel.org/r/20260914-b4-dw9800k_cleanup-v2-0-6553273aaa33@fairphone.com

Changes in v2:
- Expanded commit messages to be more verbose with their changes.
- Link to v1: https://lore.kernel.org/all/20260910-b4-dw9800k_cleanup-v1-0-608255ea61ab@fairphone.com

---
Griffin Kroah-Hartman (3):
      dt-bindings: media: i2c: dw9800: Redocument DW9800K
      media: i2c: dw9719: Update DW9800K driver
      arm64: dts: qcom: qcm6490-fairphone-fp5: Fix DW9800K support

 .../bindings/media/i2c/dongwoon,dw9719.yaml        |  1 -
 .../bindings/media/i2c/dongwoon,dw9800k.yaml       | 91 ++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts |  5 +-
 drivers/media/i2c/dw9719.c                         | 65 +++++++++++++---
 4 files changed, 150 insertions(+), 12 deletions(-)
---
base-commit: bc71431221f5ba8bb33918399552636e059c2c45
change-id: 20260910-b4-dw9800k_cleanup-0b9a7a51e149

Best regards,
-- 
Griffin Kroah-Hartman <griffin.kroah@fairphone.com>

[PATCH v3 1/3] dt-bindings: media: i2c: dw9800: Redocument DW9800K

[Griffin Kroah-Hartman]

The DW9800K's properties are too different to justify sharing the same
bindings file as the dw9719, Create a separate bindings documentation
for the Dongwoon Anatech DW9800K with its updated properties.

More specifically:

The DW9800K did not share the SAC1 and SAC6 modes
that the DW9719 used.

Description of vcm-prescale does not match the calculations labeled in
the DW9800K datasheet for how clock diving rate is computed.

New property timing-control introduced to offer more fine-tuned dividing
options available to the DW9800K.

Signed-off-by: Griffin Kroah-Hartman <griffin.kroah@fairphone.com>
---
 .../bindings/media/i2c/dongwoon,dw9719.yaml        |  1 -
 .../bindings/media/i2c/dongwoon,dw9800k.yaml       | 91 ++++++++++++++++++++++
 2 files changed, 91 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9719.yaml b/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9719.yaml
index 8e8d62436e0d0c4f9af9e52262b23881abd37cec..38db0764c0f70ad49295dcddc182b7e100a68b29 100644
--- a/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9719.yaml
+++ b/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9719.yaml
@@ -21,7 +21,6 @@ properties:
       - dongwoon,dw9718s
       - dongwoon,dw9719
       - dongwoon,dw9761
-      - dongwoon,dw9800k
 
   reg:
     maxItems: 1
diff --git a/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9800k.yaml b/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9800k.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..f5bae7b287f1bbfba0c974431bc8faf232c06c45
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9800k.yaml
@@ -0,0 +1,91 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/i2c/dongwoon,dw9800k.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Dongwoon Anatech DW9800K Bi-Direction Voice Coil Motor (Bi-VCM) Controller
+
+maintainers:
+  - Luca Weiss <luca.weiss@fairphone.com>
+  - Griffin Kroah-Hartman <griffin.kroah@fairphone.com>
+
+description:
+  The Dongwoon DW9800K is a single 10-bit digital-to-analog converter with
+  +-130 mA output current sink capability, designed for linear control of
+  bi-directional voice coil motors (Bi-VCM) in camera lenses. This chip
+  provides a Smart Actuator Control (SAC) mode intended for minimizing
+  mechanical vibration.
+
+properties:
+  compatible:
+    enum:
+      - dongwoon,dw9800k
+
+  reg:
+    maxItems: 1
+
+  vdd-supply:
+    description: VDD power supply, can range from 2.3V to 4.8V
+
+  dongwoon,sac-mode:
+    description: >
+      Slew Rate Control mode to use: direct, LSC (Linear Slope Control) or
+      SAC2-SAC5 (Smart Actuator Control).
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum:
+      - 0 # Direct mode
+      - 1 # LSC mode
+      - 2 # SAC2 mode (operation time# 0.48 x Tvib)
+      - 3 # SAC3 mode (operation time# 0.72 x Tvib)
+      - 4 # SAC4 mode (operation time# 1.20 x Tvib)
+      - 5 # SAC5 mode (operation time# 1.64 x Tvib)
+    default: 3
+
+  dongwoon,vcm-prescale:
+    description:
+      Indication of VCM internal clock dividing rate select, as one multiple
+      factor to calculate VCM ring periodic time Tvib.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum:
+      - 0 #  Dividing Rate -  2
+      - 1 #  Dividing Rate -  1
+      - 2 #  Dividing Rate -  1/2
+      - 3 #  Dividing Rate -  1/4
+      - 4 #  Dividing Rate -  8
+      - 5 #  Dividing Rate -  4
+    default: 1
+
+  dongwoon,timing-control:
+    description:
+      In LSC mode (252 + value * 4) * divider value in microseconds
+      In SAC mode (6.3 + value * 0.1) * divider value in milliseconds
+    $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 0x00
+    maximum: 0x3f
+    default: 0x20
+
+required:
+  - compatible
+  - reg
+  - vdd-supply
+
+additionalProperties: false
+
+examples:
+  - |
+    i2c {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        actuator@c {
+            compatible = "dongwoon,dw9800k";
+            reg = <0x0c>;
+
+            vdd-supply = <&pm8937_l17>;
+
+            dongwoon,sac-mode = <4>;
+            dongwoon,vcm-presc = <0>;
+            dongwoon,timing-control = <16>;
+        };
+    };

-- 
2.43.0

[PATCH v3 2/3] media: i2c: dw9719: Update DW9800K driver

[Griffin Kroah-Hartman]

The previous DW9800K driver code was created without access to a
datasheet for the part, now that we have one we can clean up some
misunderstandings and add some features for further expandability.

More specifically:

Previously we were blindly writing registers to their downstream values,
Now we know what the correct default values of SAC and SACT, and write
to the correct bits as specified from the datasheet.

We found that the device does indeed have an ID, and add it to the
switch statement when setting up the default device properties.

The largest change would be the implementation of "Ringing," this is
actually an internal switch bit used to differentiate whether the SAC
(smart actuator control) modes are enabled. if the "ringing" bit is
zero, then actuator modes DIRECT and LSC are available(based on the
value written to the Mode register). If the bit is 1, SAC2-SAC5 are
available.

For the devices we tested this driver on, no new values are being
written, but now the option for further use of the DW9800k is available
to others if they wish to do so.

Fixes: 083f7f0dce16 ("media: i2c: dw9719: Add DW9800K support")
Signed-off-by: Griffin Kroah-Hartman <griffin.kroah@fairphone.com>
---
 drivers/media/i2c/dw9719.c | 65 +++++++++++++++++++++++++++++++++++++++-------
 1 file changed, 56 insertions(+), 9 deletions(-)

diff --git a/drivers/media/i2c/dw9719.c b/drivers/media/i2c/dw9719.c
index 3b7ba88fd67c044ef9005a0aac6a5d26ab939a90..3b99c5492522c33e0aeadb9fe7e9b49f777b9470 100644
--- a/drivers/media/i2c/dw9719.c
+++ b/drivers/media/i2c/dw9719.c
@@ -68,9 +68,18 @@
 #define DW9761_VCM_PRELOAD		CCI_REG8(8)
 #define DW9761_DEFAULT_VCM_PRELOAD	0x73
 
-#define DW9800K_DEFAULT_SAC		1
+#define DW9800K_ID			0xEB
+#define DW9800K_DEFAULT_SAC		3
 #define DW9800K_MODE_SAC_SHIFT		6
-#define DW9800K_DEFAULT_VCM_FREQ		0x10
+
+#define DW9800K_RESONANCE		CCI_REG8(7)
+
+#define DW9800K_DEFAULT_DIV		0x01
+#define DW9800K_DIV_SHIFT		6
+#define DW9800K_DIV_LOW_SHIFT		2
+
+#define DW9800K_DEFAULT_SACT		0x20
+
 
 #define to_dw9719_device(x) container_of(x, struct dw9719_device, sd)
 
@@ -90,6 +99,7 @@ struct dw9719_device {
 	u32 mode_low_bits;
 	u32 sac_mode;
 	u32 vcm_freq;
+	u32 sac_time;
 
 	struct dw9719_v4l2_ctrls {
 		struct v4l2_ctrl_handler handler;
@@ -140,10 +150,6 @@ static int dw9719_power_up(struct dw9719_device *dw9719, bool detect)
 			dw9719->sac_mode = DW9718S_DEFAULT_SAC;
 			dw9719->vcm_freq = DW9718S_DEFAULT_VCM_FREQ;
 			goto props;
-		case DW9800K:
-			dw9719->sac_mode = DW9800K_DEFAULT_SAC;
-			dw9719->vcm_freq = DW9800K_DEFAULT_VCM_FREQ;
-			goto props;
 		default:
 			break;
 		}
@@ -165,6 +171,11 @@ static int dw9719_power_up(struct dw9719_device *dw9719, bool detect)
 			dw9719->sac_mode = DW9761_DEFAULT_SAC;
 			dw9719->vcm_freq = DW9761_DEFAULT_VCM_FREQ;
 			break;
+		case DW9800K_ID:
+			dw9719->sac_mode = DW9800K_DEFAULT_SAC;
+			dw9719->vcm_freq = DW9800K_DEFAULT_DIV;
+			dw9719->sac_time = DW9800K_DEFAULT_SACT;
+			break;
 		default:
 			dev_err(dw9719->dev,
 				"Error unknown device id 0x%02llx\n", val);
@@ -185,14 +196,50 @@ static int dw9719_power_up(struct dw9719_device *dw9719, bool detect)
 		/* Optional indication of VCM prescale */
 		device_property_read_u32(dw9719->dev, "dongwoon,vcm-prescale",
 					 &dw9719->vcm_freq);
+
+		/* Optional indication of SAC timing */
+		device_property_read_u32(dw9719->dev, "dongwoon,timing-control",
+					 &dw9719->sac_time);
 	}
 
 	switch (dw9719->model) {
 	case DW9800K:
-		cci_write(dw9719->regmap, DW9719_CONTROL, DW9719_ENABLE_RINGING, &ret);
+		int ring, sac;
+
+		/*
+		 * Enable ringing for SAC3-SAC5
+		 *
+		 * sac_mode	reg	Mode
+		 * ===========================
+		 *	0	0X	Direct
+		 *	1	1X	LSC
+		 *	2	00	SAC2
+		 *	3	01	SAC3
+		 *	4	10	SAC4
+		 *	5	11	SAC5
+		 */
+		switch (dw9719->sac_mode) {
+		case 0:
+			ring = 0;
+			sac = 0;
+			break;
+		case 1:
+			ring = 0;
+			sac = 2;
+			break;
+		default:
+			ring = DW9719_ENABLE_RINGING;
+			sac = dw9719->sac_mode - 2;
+			break;
+		}
+		cci_write(dw9719->regmap, DW9719_CONTROL, ring, &ret);
+		/* DIV is 3 bits split over the bottom bit in reg 6 and the top 2 bits in reg 7 */
 		cci_write(dw9719->regmap, DW9719_MODE,
-			  dw9719->sac_mode << DW9800K_MODE_SAC_SHIFT, &ret);
-		cci_write(dw9719->regmap, DW9719_VCM_FREQ, dw9719->vcm_freq, &ret);
+			  (sac << DW9800K_MODE_SAC_SHIFT) |
+			  (dw9719->vcm_freq >> DW9800K_DIV_LOW_SHIFT), &ret);
+		cci_write(dw9719->regmap, DW9800K_RESONANCE,
+			  (dw9719->vcm_freq << DW9800K_DIV_SHIFT) |
+			  dw9719->sac_time, &ret);
 		break;
 	case DW9718S:
 		/* Datasheet says [OCP/UVLO] should be disabled below 2.5V */

-- 
2.43.0

[PATCH v3 3/3] arm64: dts: qcom: qcm6490-fairphone-fp5: Fix DW9800K support

[Griffin Kroah-Hartman]

Update the node for the DW9800K for correctness.

Now we correctly select SAC3 mode and enable timing-control with the newly
updated device tree bindings.

This is a breaking change for a part that was previously functioning,
but only due to manual register writes in the driver. Now that we have
the correct documentation we are able to update everything to ensure
functionality with other devices using this part.

Signed-off-by: Griffin Kroah-Hartman <griffin.kroah@fairphone.com>
---
 arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
index f41ad446a39e2308abaea68a6b31a7e387881bf2..a657a5dcba9cdf750fab2478ca319f3a592ea295 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
@@ -665,8 +665,9 @@ camera_imx858_dw9800k: actuator@e {
 		reg = <0x0e>;
 		vdd-supply = <&vreg_afvdd_2p8>;
 
-		dongwoon,sac-mode = <1>;
-		dongwoon,vcm-prescale = <16>;
+		dongwoon,sac-mode = <3>;
+		dongwoon,vcm-prescale = <0>;
+		dongwoon,timing-control = <16>;
 	};
 
 	/* IMX858 @ 29 */

-- 
2.43.0

Re: [PATCH v3 1/3] dt-bindings: media: i2c: dw9800: Redocument DW9800K

[Rob Herring (Arm)]

On Thu, 05 Nov 2026 11:29:00 +0100, Griffin Kroah-Hartman wrote:
> The DW9800K's properties are too different to justify sharing the same
> bindings file as the dw9719, Create a separate bindings documentation
> for the Dongwoon Anatech DW9800K with its updated properties.
> 
> More specifically:
> 
> The DW9800K did not share the SAC1 and SAC6 modes
> that the DW9719 used.
> 
> Description of vcm-prescale does not match the calculations labeled in
> the DW9800K datasheet for how clock diving rate is computed.
> 
> New property timing-control introduced to offer more fine-tuned dividing
> options available to the DW9800K.
> 
> Signed-off-by: Griffin Kroah-Hartman <griffin.kroah@fairphone.com>
> ---
>  .../bindings/media/i2c/dongwoon,dw9719.yaml        |  1 -
>  .../bindings/media/i2c/dongwoon,dw9800k.yaml       | 91 ++++++++++++++++++++++
>  2 files changed, 91 insertions(+), 1 deletion(-)
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/media/i2c/dongwoon,dw9800k.example.dtb: actuator@c (dongwoon,dw9800k): 'dongwoon,vcm-presc' does not match any of the regexes: '^pinctrl-[0-9]+$'
	from schema $id: http://devicetree.org/schemas/media/i2c/dongwoon,dw9800k.yaml
Documentation/devicetree/bindings/media/i2c/dongwoon,dw9800k.example.dtb: actuator@c (dongwoon,dw9800k): dongwoon,vcm-presc: b'\x00\x00\x00\x00' is not of type 'object', 'integer', 'array', 'boolean', 'null'
	from schema $id: http://devicetree.org/schemas/dt-core.yaml

doc reference errors (make refcheckdocs):

See https://patchwork.kernel.org/project/devicetree/patch/20261105-b4-dw9800k_cleanup-v3-1-6850ee6a5a5a@fairphone.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

Re: [PATCH v3 2/3] media: i2c: dw9719: Update DW9800K driver

[kernel test robot]

Hi Griffin,

kernel test robot noticed the following build errors:

[auto build test ERROR on bc71431221f5ba8bb33918399552636e059c2c45]

url:    https://github.com/intel-lab-lkp/linux/commits/Griffin-Kroah-Hartman/dt-bindings-media-i2c-dw9800-Redocument-DW9800K/20261105-112900
base:   bc71431221f5ba8bb33918399552636e059c2c45
patch link:    https://lore.kernel.org/r/20261105-b4-dw9800k_cleanup-v3-2-6850ee6a5a5a%40fairphone.com
patch subject: [PATCH v3 2/3] media: i2c: dw9719: Update DW9800K driver
config: nios2-randconfig-1001-20261105 (https://download.01.org/0day-ci/archive/20261106/202611060251.DGnOao2F-lkp@intel.com/config)
compiler: nios2-linux-gcc (GCC) 10.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20261106/202611060251.DGnOao2F-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202611060251.DGnOao2F-lkp@intel.com/

All errors (new ones prefixed by >>):

   drivers/media/i2c/dw9719.c: In function 'dw9719_power_up':
>> drivers/media/i2c/dw9719.c:207:3: error: a label can only be part of a statement and a declaration is not a statement
     207 |   int ring, sac;
         |   ^~~


vim +207 drivers/media/i2c/dw9719.c

   122	
   123	static int dw9719_power_up(struct dw9719_device *dw9719, bool detect)
   124	{
   125		u32 reg_pwr = dw9719->model == DW9718S ? DW9718S_PD : DW9719_CONTROL;
   126		u64 val;
   127		int ret;
   128		int err;
   129	
   130		ret = regulator_enable(dw9719->regulator);
   131		if (ret)
   132			return ret;
   133	
   134		/*
   135		 * Need 100us to transition from SHUTDOWN to STANDBY.
   136		 * Jiggle the SCL pin to wake up the device (even when the regulator is
   137		 * shared) and wait double the time to be sure, as 100us is not enough
   138		 * at least on the DW9718S as found on the motorola-nora smartphone,
   139		 * then retry the write.
   140		 */
   141		cci_write(dw9719->regmap, reg_pwr, DW9719_STANDBY, NULL);
   142		/* the jiggle is expected to fail, don't even log that as error */
   143		fsleep(200);
   144		cci_write(dw9719->regmap, reg_pwr, DW9719_STANDBY, &ret);
   145	
   146		if (detect) {
   147			/* These models do not have an INFO register */
   148			switch (dw9719->model) {
   149			case DW9718S:
   150				dw9719->sac_mode = DW9718S_DEFAULT_SAC;
   151				dw9719->vcm_freq = DW9718S_DEFAULT_VCM_FREQ;
   152				goto props;
   153			default:
   154				break;
   155			}
   156	
   157			ret = cci_read(dw9719->regmap, DW9719_INFO, &val, NULL);
   158			if (ret < 0)
   159				return ret;
   160	
   161			switch (val) {
   162			case DW9719_ID:
   163				dw9719->model = DW9719;
   164				dw9719->mode_low_bits = 0x00;
   165				dw9719->sac_mode = DW9719_DEFAULT_SAC;
   166				dw9719->vcm_freq = DW9719_DEFAULT_VCM_FREQ;
   167				break;
   168			case DW9761_ID:
   169				dw9719->model = DW9761;
   170				dw9719->mode_low_bits = 0x01;
   171				dw9719->sac_mode = DW9761_DEFAULT_SAC;
   172				dw9719->vcm_freq = DW9761_DEFAULT_VCM_FREQ;
   173				break;
   174			case DW9800K_ID:
   175				dw9719->sac_mode = DW9800K_DEFAULT_SAC;
   176				dw9719->vcm_freq = DW9800K_DEFAULT_DIV;
   177				dw9719->sac_time = DW9800K_DEFAULT_SACT;
   178				break;
   179			default:
   180				dev_err(dw9719->dev,
   181					"Error unknown device id 0x%02llx\n", val);
   182				return -ENXIO;
   183			}
   184	
   185	props:
   186			/* Optional indication of SAC mode select */
   187			device_property_read_u32(dw9719->dev, "dongwoon,sac-mode",
   188						 &dw9719->sac_mode);
   189	
   190			/* Optional indication of VCM frequency */
   191			err = device_property_read_u32(dw9719->dev, "dongwoon,vcm-freq",
   192						       &dw9719->vcm_freq);
   193			if (err == 0)
   194				dev_warn(dw9719->dev, "dongwoon,vcm-freq property is deprecated, please use dongwoon,vcm-prescale\n");
   195	
   196			/* Optional indication of VCM prescale */
   197			device_property_read_u32(dw9719->dev, "dongwoon,vcm-prescale",
   198						 &dw9719->vcm_freq);
   199	
   200			/* Optional indication of SAC timing */
   201			device_property_read_u32(dw9719->dev, "dongwoon,timing-control",
   202						 &dw9719->sac_time);
   203		}
   204	
   205		switch (dw9719->model) {
   206		case DW9800K:
 > 207			int ring, sac;
   208	
   209			/*
   210			 * Enable ringing for SAC3-SAC5
   211			 *
   212			 * sac_mode	reg	Mode
   213			 * ===========================
   214			 *	0	0X	Direct
   215			 *	1	1X	LSC
   216			 *	2	00	SAC2
   217			 *	3	01	SAC3
   218			 *	4	10	SAC4
   219			 *	5	11	SAC5
   220			 */
   221			switch (dw9719->sac_mode) {
   222			case 0:
   223				ring = 0;
   224				sac = 0;
   225				break;
   226			case 1:
   227				ring = 0;
   228				sac = 2;
   229				break;
   230			default:
   231				ring = DW9719_ENABLE_RINGING;
   232				sac = dw9719->sac_mode - 2;
   233				break;
   234			}
   235			cci_write(dw9719->regmap, DW9719_CONTROL, ring, &ret);
   236			/* DIV is 3 bits split over the bottom bit in reg 6 and the top 2 bits in reg 7 */
   237			cci_write(dw9719->regmap, DW9719_MODE,
   238				  (sac << DW9800K_MODE_SAC_SHIFT) |
   239				  (dw9719->vcm_freq >> DW9800K_DIV_LOW_SHIFT), &ret);
   240			cci_write(dw9719->regmap, DW9800K_RESONANCE,
   241				  (dw9719->vcm_freq << DW9800K_DIV_SHIFT) |
   242				  dw9719->sac_time, &ret);
   243			break;
   244		case DW9718S:
   245			/* Datasheet says [OCP/UVLO] should be disabled below 2.5V */
   246			dw9719->sac_mode &= DW9718S_CONTROL_SAC_MASK;
   247			cci_write(dw9719->regmap, DW9718S_CONTROL,
   248				  DW9718S_CONTROL_SW_LINEAR |
   249				  (dw9719->sac_mode << DW9718S_CONTROL_SAC_SHIFT) |
   250				  DW9718S_CONTROL_OCP_DISABLE |
   251				  DW9718S_CONTROL_UVLO_DISABLE, &ret);
   252			cci_write(dw9719->regmap, DW9718S_SACT,
   253				  DW9718S_SACT_PERIOD_8_8MS, &ret);
   254			cci_write(dw9719->regmap, DW9718S_SW,
   255				  dw9719->vcm_freq & DW9718S_SW_VCM_FREQ_MASK, &ret);
   256			break;
   257		case DW9761:
   258			cci_write(dw9719->regmap, DW9761_VCM_PRELOAD,
   259				  DW9761_DEFAULT_VCM_PRELOAD, &ret);
   260			fallthrough;
   261		case DW9719:
   262			cci_write(dw9719->regmap, DW9719_CONTROL, DW9719_ENABLE_RINGING, &ret);
   263			cci_write(dw9719->regmap, DW9719_MODE, dw9719->mode_low_bits |
   264					  (dw9719->sac_mode << DW9719_MODE_SAC_SHIFT), &ret);
   265			cci_write(dw9719->regmap, DW9719_VCM_FREQ, dw9719->vcm_freq, &ret);
   266		}
   267	
   268		if (ret)
   269			dw9719_power_down(dw9719);
   270	
   271		return ret;
   272	}
   273	

--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki