From: "Bowman, Terry" <terry.bowman@amd.com>
To: Jonathan Cameron <jonathan.cameron@huawei.com>
Cc: dave@stgolabs.net, dave.jiang@intel.com,
alison.schofield@intel.com, dan.j.williams@intel.com,
bhelgaas@google.com, shiju.jose@huawei.com, ming.li@zohomail.com,
Smita.KoralahalliChannabasappa@amd.com, rrichter@amd.com,
dan.carpenter@linaro.org, PradeepVineshReddy.Kodamati@amd.com,
lukas@wunner.de, Benjamin.Cheatham@amd.com,
sathyanarayanan.kuppuswamy@linux.intel.com,
linux-cxl@vger.kernel.org, alucerop@amd.com, ira.weiny@intel.com,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v12 07/25] CXL/PCI: Move CXL DVSEC definitions into uapi/linux/pci_regs.h
Date: Thu, 2 Oct 2025 10:25:54 -0500 [thread overview]
Message-ID: <17f51c55-2355-46f0-84e3-3a76a615d9bb@amd.com> (raw)
In-Reply-To: <20251001165843.0000321e@huawei.com>
On 10/1/2025 10:58 AM, Jonathan Cameron wrote:
> On Thu, 25 Sep 2025 17:34:22 -0500
> Terry Bowman <terry.bowman@amd.com> wrote:
>
>> The CXL DVSECs are currently defined in cxl/core/cxlpci.h. These are not
>> accessible to other subsystems.
>>
>> Change DVSEC name formatting to follow the existing PCI format in
>> pci_regs.h. The current format uses CXL_DVSEC_XYZ. Change to be PCI_DVSEC_CXL_XYZ.
>> Reuse the existing formatting.
>>
>> Update existing occurrences to match the name change.
>>
>> Update the inline documentation to refer to latest CXL spec version.
>>
>> Signed-off-by: Terry Bowman <terry.bowman@amd.com>
> Maybe we discussed it in earlier versions and I've forgotten but generally renaming
> uapi defines is a non starter.
>
> I was kind of assuming lspci used these, but nope, it uses hard coded
> value of 3 and it's own defines for the fields. (A younger me even reviewed
> the patch adding those :) )
>
> https://github.com/pciutils/pciutils/blob/master/ls-ecaps.c#L1279
>
> However, that doesn't mean other code isn't already using those defines.
>
> Minimum I think would be to state here why you think we can get away with
> this change.
>
> Personally I'd just not bother changing that one.
>
> Jonathan
>
>
Ok, I'll leave these below as-is.
#define PCI_DVSEC_CXL_PORT 3
#define PCI_DVSEC_CXL_PORT_CTL 0x0c
#define PCI_DVSEC_CXL_PORT_CTL_UNMASK_SBR 0x00000001
Terry
>> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
>> index f5b17745de60..bd03799612d3 100644
>> --- a/include/uapi/linux/pci_regs.h
>> +++ b/include/uapi/linux/pci_regs.h
>> @@ -1234,9 +1234,64 @@
>> /* Deprecated old name, replaced with PCI_DOE_DATA_OBJECT_DISC_RSP_3_TYPE */
>> #define PCI_DOE_DATA_OBJECT_DISC_RSP_3_PROTOCOL PCI_DOE_DATA_OBJECT_DISC_RSP_3_TYPE
>>
>> -/* Compute Express Link (CXL r3.1, sec 8.1.5) */
>> -#define PCI_DVSEC_CXL_PORT 3
> This is a userspace header. We can't rename existing definitions
> as we have no idea who is using them. Only option would be to
> add a comment making the old ones deprecated and adding new ones alongside.
>
>
>> -#define PCI_DVSEC_CXL_PORT_CTL 0x0c
>> -#define PCI_DVSEC_CXL_PORT_CTL_UNMASK_SBR 0x00000001
> ....
>
>> +/* CXL 3.2 8.1.5: Extensions DVSEC for Ports */
>> +#define PCI_DVSEC_CXL_PORT_EXT 3
>> +#define PCI_DVSEC_CXL_PORT_EXT_CTL_OFFSET 0x0c
>> +#define PCI_DVSEC_CXL_PORT_EXT_CTL_UNMASK_SBR 0x00000001
next prev parent reply other threads:[~2025-10-02 15:26 UTC|newest]
Thread overview: 87+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-25 22:34 [PATCH v12 00/25] Enable CXL PCIe Port Protocol Error handling and logging Terry Bowman
2025-09-25 22:34 ` [PATCH v12 01/25] cxl/pci: Remove unnecessary CXL Endpoint handling helper functions Terry Bowman
2025-09-25 22:34 ` [PATCH v12 02/25] cxl/pci: Remove unnecessary CXL RCH " Terry Bowman
2025-10-01 15:09 ` Jonathan Cameron
2025-09-25 22:34 ` [PATCH v12 03/25] cxl: Remove ifdef blocks of CONFIG_PCIEAER_CXL from core/pci.c Terry Bowman
2025-10-03 20:11 ` Cheatham, Benjamin
2025-09-25 22:34 ` [PATCH v12 04/25] CXL/AER: Remove CONFIG_PCIEAER_CXL and replace with CONFIG_CXL_RAS Terry Bowman
2025-09-25 23:17 ` Dave Jiang
2025-10-01 15:11 ` Jonathan Cameron
2025-09-25 22:34 ` [PATCH v12 05/25] cxl: Move CXL driver RCH error handling into CONFIG_CXL_RCH_RAS conditional block Terry Bowman
2025-09-25 23:31 ` Dave Jiang
2025-10-01 15:23 ` Jonathan Cameron
2025-09-25 22:34 ` [PATCH v12 06/25] CXL/AER: Introduce aer_cxl_rch.c into AER driver for handling CXL RCH errors Terry Bowman
2025-09-25 23:36 ` Dave Jiang
2025-09-26 12:32 ` kernel test robot
2025-10-01 15:42 ` Jonathan Cameron
2025-09-25 22:34 ` [PATCH v12 07/25] CXL/PCI: Move CXL DVSEC definitions into uapi/linux/pci_regs.h Terry Bowman
2025-09-25 23:53 ` Dave Jiang
2025-10-01 15:58 ` Jonathan Cameron
2025-10-02 15:25 ` Bowman, Terry [this message]
2025-10-03 20:11 ` Cheatham, Benjamin
2025-09-25 22:34 ` [PATCH v12 08/25] PCI/CXL: Introduce pcie_is_cxl() Terry Bowman
2025-09-25 22:34 ` [PATCH v12 09/25] PCI/AER: Report CXL or PCIe bus error type in trace logging Terry Bowman
2025-10-03 20:11 ` Cheatham, Benjamin
2025-10-06 19:59 ` Bowman, Terry
2025-09-25 22:34 ` [PATCH v12 10/25] CXL/AER: Update PCI class code check to use FIELD_GET() Terry Bowman
2025-09-26 0:02 ` Dave Jiang
2025-10-01 16:12 ` Jonathan Cameron
2025-10-02 7:40 ` Lukas Wunner
2025-10-30 17:16 ` Bowman, Terry
2025-10-31 5:30 ` Lukas Wunner
2025-09-25 22:34 ` [PATCH v12 11/25] cxl/pci: Update RAS handler interfaces to also support CXL Ports Terry Bowman
2025-10-03 20:11 ` Cheatham, Benjamin
2025-09-25 22:34 ` [PATCH v12 12/25] cxl/pci: Log message if RAS registers are unmapped Terry Bowman
2025-10-03 20:11 ` Cheatham, Benjamin
2025-09-25 22:34 ` [PATCH v12 13/25] cxl/pci: Unify CXL trace logging for CXL Endpoints and CXL Ports Terry Bowman
2025-09-26 20:44 ` Dave Jiang
2025-09-25 22:34 ` [PATCH v12 14/25] cxl/pci: Update cxl_handle_cor_ras() to return early if no RAS errors Terry Bowman
2025-10-03 20:11 ` Cheatham, Benjamin
2025-09-25 22:34 ` [PATCH v12 15/25] cxl/pci: Map CXL Endpoint Port and CXL Switch Port RAS registers Terry Bowman
2025-09-26 21:10 ` Dave Jiang
2025-10-24 10:25 ` Alejandro Lucero Palau
2025-10-24 17:15 ` Dave Jiang
2025-10-24 19:40 ` Bowman, Terry
2025-10-27 16:33 ` Alejandro Lucero Palau
2025-09-25 22:34 ` [PATCH v12 16/25] CXL/PCI: Introduce PCI_ERS_RESULT_PANIC Terry Bowman
2025-09-26 21:26 ` Dave Jiang
2025-10-01 16:14 ` Jonathan Cameron
2025-10-03 20:11 ` Cheatham, Benjamin
2025-09-25 22:34 ` [PATCH v12 17/25] cxl/pci: Introduce CXL Endpoint protocol error handlers Terry Bowman
2025-09-26 22:04 ` Dave Jiang
2025-09-30 14:06 ` Bowman, Terry
2025-09-30 16:09 ` Dave Jiang
2025-10-03 20:12 ` Cheatham, Benjamin
2025-10-06 21:07 ` Bowman, Terry
2025-09-25 22:34 ` [PATCH v12 18/25] CXL/AER: Introduce aer_cxl_vh.c in AER driver for forwarding CXL errors Terry Bowman
2025-09-26 22:56 ` Dave Jiang
2025-10-03 20:12 ` Cheatham, Benjamin
2025-09-25 22:34 ` [PATCH v12 19/25] cxl: Introduce cxl_pci_drv_bound() to check for bound driver Terry Bowman
2025-09-26 23:02 ` Dave Jiang
2025-10-02 12:27 ` Jonathan Cameron
2025-10-03 20:12 ` Cheatham, Benjamin
2025-09-25 22:34 ` [PATCH v12 20/25] PCI/AER: Dequeue forwarded CXL error Terry Bowman
2025-09-26 23:26 ` Dave Jiang
2025-10-03 20:12 ` Cheatham, Benjamin
2025-10-06 20:17 ` Dave Jiang
2025-09-25 22:34 ` [PATCH v12 21/25] CXL/PCI: Introduce CXL Port protocol error handlers Terry Bowman
2025-09-29 23:32 ` Dave Jiang
2025-10-03 20:12 ` Cheatham, Benjamin
2025-10-06 21:28 ` Bowman, Terry
2025-09-25 22:34 ` [PATCH v12 22/25] CXL/PCI: Export and rename merge_result() to pci_ers_merge_result() Terry Bowman
2025-09-26 15:01 ` kernel test robot
2025-09-26 18:10 ` kernel test robot
2025-09-25 22:34 ` [PATCH v12 23/25] CXL/PCI: Introduce CXL uncorrectable protocol error recovery Terry Bowman
2025-09-30 0:26 ` Dave Jiang
2025-09-30 14:38 ` Bowman, Terry
2025-09-30 16:13 ` Dave Jiang
2025-09-30 16:43 ` Bowman, Terry
2025-09-30 16:46 ` Dave Jiang
2025-10-01 13:58 ` Bowman, Terry
2025-10-01 15:33 ` Dave Jiang
2025-10-03 20:12 ` Cheatham, Benjamin
2025-09-25 22:34 ` [PATCH v12 24/25] CXL/PCI: Enable CXL protocol errors during CXL Port probe Terry Bowman
2025-09-30 0:28 ` Dave Jiang
2025-10-03 20:12 ` Cheatham, Benjamin
2025-09-25 22:34 ` [PATCH v12 25/25] CXL/PCI: Disable CXL protocol error interrupts during CXL Port cleanup Terry Bowman
2025-10-03 20:12 ` Cheatham, Benjamin
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