From: Krzysztof Kozlowski <krzk@kernel.org>
To: Yi xin Zhu <yzhu@maxlinear.com>,
"vkoul@kernel.org" <vkoul@kernel.org>,
"robh@kernel.org" <robh@kernel.org>,
"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
"kees@kernel.org" <kees@kernel.org>,
"dave.jiang@intel.com" <dave.jiang@intel.com>,
"av2082000@gmail.com" <av2082000@gmail.com>,
"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 1/3] dt-bindings: lgm-dma: Added intel,dma-sw-desc property.
Date: Fri, 15 Aug 2025 12:40:04 +0200 [thread overview]
Message-ID: <1826bd7a-621d-49d0-b6ff-7ff723ec9f2c@kernel.org> (raw)
In-Reply-To: <SA1PR19MB4909BA87E8CE98B5A6389349C234A@SA1PR19MB4909.namprd19.prod.outlook.com>
On 15/08/2025 12:06, Yi xin Zhu wrote:
> Hi Krzysztof,
> On 15/08/2025 16:32, Krzysztof wrote:
>>
>>
>> And how is it not a OS policy? Bring reasoning and arguments, otherwise I
>> cannot help you. Your reply above has zero hardware-related arguments, zero
>> facts, zero hardware description.
>>
>> Best regards,
>> Krzysztof
>
> Let me first describe the DMA hardware capability. The DMA IP is designed with two control paths.
> 1. Hardware descriptor mode. The DMA can be connected to another HW component that provides
> Descriptors to DMA to automate DMA transfers.
> 2. Software descriptor mode. The DMA IP also has interface to CPU via registers to allow CPU to
> manage the DMA transfers.
>
> Which mode DMA works in depends on SoC level configuration. In the SoC, it could be some
What is a "SoC level configuration"?
From your explanation 1+2 it feels like consumer chooses it. Where is a
full DTS showing all this?
> of the DMA instances work in hardware descriptor mode while other DMA instances work in
> software descriptor mode or all in HW/SW mode.
>
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-08-15 10:40 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-08 3:22 Zhu Yixin
2025-08-08 3:22 ` [PATCH v2 2/3] dmaengine: lgm-dma: splitting CDMA and HDMA functions Zhu Yixin
2025-08-08 3:22 ` [PATCH v2 3/3] dmaengine: lgm-dma: Added Software management functions on HDMA Zhu Yixin
2025-08-08 6:11 ` Krzysztof Kozlowski
2025-08-15 6:51 ` Yi xin Zhu
2025-08-08 6:09 ` [PATCH v2 1/3] dt-bindings: lgm-dma: Added intel,dma-sw-desc property Krzysztof Kozlowski
2025-08-15 7:07 ` Yi xin Zhu
2025-08-15 8:32 ` Krzysztof Kozlowski
2025-08-15 10:06 ` Yi xin Zhu
2025-08-15 10:40 ` Krzysztof Kozlowski [this message]
2025-08-18 8:41 ` Yi xin Zhu
2025-08-24 10:26 ` Krzysztof Kozlowski
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