From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Loic Poulain <loic.poulain@oss.qualcomm.com>
Cc: Robert Foss <rfoss@kernel.org>,
Andi Shyti <andi.shyti@kernel.org>,
Wolfram Sang <wsa+renesas@sang-engineering.com>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Luca Weiss <luca@lucaweiss.eu>,
linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/3] i2c: qcom-cci: Fix CCI clock rate enforcement
Date: Tue, 21 Jul 2026 19:01:00 +0200 [thread overview]
Message-ID: <1a4155a5-14f6-410c-907c-b2cd8d311bfe@oss.qualcomm.com> (raw)
In-Reply-To: <CAFEp6-3Zd9Rg0h3v5FGT_RoJiXg8qYNbyCmdx-tO16p8nyBuZQ@mail.gmail.com>
On 7/21/26 5:41 PM, Loic Poulain wrote:
> Hi Konrad,
>
> On Tue, Jul 21, 2026 at 5:07 PM Konrad Dybcio
> <konrad.dybcio@oss.qualcomm.com> wrote:
>>
>> On 7/21/26 4:58 PM, Loic Poulain wrote:
>>> The hw_params timing values (thigh, tlow, etc.) are in CCI clock ticks
>>> and were calibrated for a specific clock rate per hardware variant. If
>>> the clock is running at a different rate the I2C timings will be wrong,
>>> potentially violating the I2C specification.
>>>
>>> Rather than just warning about a mismatch, actively set the clock to the
>>> expected rate at probe time. Warn if the rate could not be applied so the
>>> user is informed that timings may be incorrect.
>>>
>>> Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
>>> ---
[...]
>>> + cci_clk = devm_clk_get(dev, "cci");
>>> + if (IS_ERR(cci_clk))
>>> + return dev_err_probe(dev, PTR_ERR(cci_clk), "failed to get CCI clock\n");
>>> +
>>> + clk_set_rate(cci_clk, cci->data->cci_clk_rate);
>>> + if (clk_get_rate(cci_clk) != cci->data->cci_clk_rate)
>>> + dev_warn(dev, "CCI clock is not at expected %lu Hz\n",
>>> + cci->data->cci_clk_rate);
>>
>> This needs to go through OPP.
>>
>> Feel free to take over and refresh:
>>
>> https://lore.kernel.org/linux-arm-msm/20250904-topic-cci_updates-v1-0-d38559692703@oss.qualcomm.com/
>
> Sorry for missing your series earlier. I still think we need this
> series to restore the expected clock rate information in the driver
> and enforce it at probe time, right now the timing tables are
> calibrated for a specific frequency and the driver has no way to
> verify or correct what it gets.
What I'm saying is that you need to call dev_pm_opp_set_rate()
anyway, clk_set_rate() doesn't take into account the required
OPPs for a frequency, and those are very low, but non-zero for
CCI. Unfortunately that comes with the added headache of
maintaining an OPP table for each target anyway..
Konrad
next prev parent reply other threads:[~2026-07-21 17:01 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-21 14:58 [PATCH 0/3] " Loic Poulain
2026-07-21 14:58 ` [PATCH 1/3] Revert "i2c: qcom-cci: Remove unused struct member cci_clk_rate" Loic Poulain
2026-07-24 22:57 ` Andi Shyti
2026-07-25 5:41 ` Vladimir Zapolskiy
2026-07-25 8:40 ` Vladimir Zapolskiy
2026-07-26 15:08 ` Andi Shyti
2026-07-21 14:58 ` [PATCH 2/3] i2c: qcom-cci: Add missing cci_clk_rate for msm8953 Loic Poulain
2026-07-25 6:42 ` Vladimir Zapolskiy
2026-07-25 8:36 ` Vladimir Zapolskiy
2026-07-25 13:06 ` Loic Poulain
2026-07-25 14:19 ` Vladimir Zapolskiy
2026-07-21 14:58 ` [PATCH 3/3] i2c: qcom-cci: Fix CCI clock rate enforcement Loic Poulain
2026-07-21 15:07 ` Konrad Dybcio
2026-07-21 15:41 ` Loic Poulain
2026-07-21 17:01 ` Konrad Dybcio [this message]
2026-07-23 3:04 ` [PATCH 0/3] " Wenmeng Liu
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