* [PATCH 1/5] dt-bindings: arm: Add Coresight device Trace NOC definition
2025-02-20 9:41 [PATCH 0/5] coresight: Add Coresight Trace NOC driver Yuanfang Zhang
@ 2025-02-20 9:41 ` Yuanfang Zhang
2025-02-20 12:25 ` Krzysztof Kozlowski
2025-02-20 9:41 ` [PATCH 2/5] coresight: add coresight Trace NOC driver Yuanfang Zhang
` (3 subsequent siblings)
4 siblings, 1 reply; 15+ messages in thread
From: Yuanfang Zhang @ 2025-02-20 9:41 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Alexander Shishkin
Cc: kernel, linux-kernel, coresight, linux-arm-kernel, Yuanfang Zhang
Adds new coresight-tnoc.yaml file describing the bindings required
to define Trace NOC in the device trees.
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
---
.../bindings/arm/qcom,coresight-tnoc.yaml | 107 +++++++++++++++++++++
1 file changed, 107 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..b8c1aaf014fb483fd960ec55d1193fb3f66136d2
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
@@ -0,0 +1,107 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/qcom,coresight-tnoc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Ttrace NOC(Network On Chip)
+
+maintainers:
+ - yuanfang Zhang <quic_yuanfang@quicinc.com>
+
+description:
+ The Trace NoC is an integration hierarchy which is a replacement of Dragonlink tile configuration.
+ It brings together debug component like TPDA, funnel and interconnect Trace Noc which collects trace
+ from subsystems and transfers to QDSS sink.
+
+ It sits in the different subsystem of SOC and aggregates the trace and transports it to Aggregation TNoC
+ or to QDSS trace sink eventually. Trace NoC embeds bridges for all the interfaces(APB, ATB, QPMDA & NTS).
+
+ Trace NoC can take inputs from different trace sources i.e. ATB, QPMDA.
+
+# Need a custom select here or 'arm,primecell' will match on lots of nodes
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,coresight-tnoc
+ required:
+ - compatible
+
+properties:
+ $nodename:
+ pattern: "^tn(@[0-9a-f]+)$"
+ compatible:
+ items:
+ - const: qcom,coresight-tnoc
+ - const: arm,primecell
+
+ reg:
+ minItems: 1
+ maxItems: 2
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: apb_pclk
+
+ in-ports:
+ description: |
+ Input connections from subsystem to TNoC
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ out-ports:
+ description: |
+ Output connections from the TNoC to Aggreg TNoC or to legacy CoreSight trace bus.
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port:
+ description: |
+ Output connections from the TNoC to Aggreg TNoC or to legacy CoreSight trace bus.
+ $ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - in-ports
+ - out-ports
+
+additionalProperties: false
+
+examples:
+ - |
+ tn@109ab000 {
+ compatible = "qcom,coresight-tnoc", "arm,primecell";
+ reg = <0x0 0x109ab000 0x0 0x4200>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ tn_ag_in_tpdm_gcc: endpoint {
+ remote-endpoint = <&tpdm_gcc_out_tn_ag>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ tn_ag_out_funnel_in1: endpoint {
+ remote-endpoint = <&funnel_in1_in_tn_ag>;
+ };
+ };
+ };
+ };
+...
--
2.34.1
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH 1/5] dt-bindings: arm: Add Coresight device Trace NOC definition
2025-02-20 9:41 ` [PATCH 1/5] dt-bindings: arm: Add Coresight device Trace NOC definition Yuanfang Zhang
@ 2025-02-20 12:25 ` Krzysztof Kozlowski
2025-02-26 11:01 ` Yuanfang Zhang
0 siblings, 1 reply; 15+ messages in thread
From: Krzysztof Kozlowski @ 2025-02-20 12:25 UTC (permalink / raw)
To: Yuanfang Zhang, Suzuki K Poulose, Mike Leach, James Clark,
Alexander Shishkin
Cc: kernel, linux-kernel, coresight, linux-arm-kernel
On 20/02/2025 10:41, Yuanfang Zhang wrote:
> Adds new coresight-tnoc.yaml file describing the bindings required
> to define Trace NOC in the device trees.
>
> Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
<form letter>
Please use scripts/get_maintainers.pl to get a list of necessary people
and lists to CC. It might happen, that command when run on an older
kernel, gives you outdated entries. Therefore please be sure you base
your patches on recent Linux kernel.
Tools like b4 or scripts/get_maintainer.pl provide you proper list of
people, so fix your workflow. Tools might also fail if you work on some
ancient tree (don't, instead use mainline) or work on fork of kernel
(don't, instead use mainline). Just use b4 and everything should be
fine, although remember about `b4 prep --auto-to-cc` if you added new
patches to the patchset.
You missed at least devicetree list (maybe more), so this won't be
tested by automated tooling. Performing review on untested code might be
a waste of time.
Please kindly resend and include all necessary To/Cc entries.
</form letter>
> ---
> .../bindings/arm/qcom,coresight-tnoc.yaml | 107 +++++++++++++++++++++
> 1 file changed, 107 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..b8c1aaf014fb483fd960ec55d1193fb3f66136d2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
> @@ -0,0 +1,107 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/qcom,coresight-tnoc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Ttrace NOC(Network On Chip)
> +
> +maintainers:
> + - yuanfang Zhang <quic_yuanfang@quicinc.com>
> +
> +description:
> + The Trace NoC is an integration hierarchy which is a replacement of Dragonlink tile configuration.
> + It brings together debug component like TPDA, funnel and interconnect Trace Noc which collects trace
Wrap according to coding style.
> + from subsystems and transfers to QDSS sink.
> +
> + It sits in the different subsystem of SOC and aggregates the trace and transports it to Aggregation TNoC
> + or to QDSS trace sink eventually. Trace NoC embeds bridges for all the interfaces(APB, ATB, QPMDA & NTS).
> +
> + Trace NoC can take inputs from different trace sources i.e. ATB, QPMDA.
> +
> +# Need a custom select here or 'arm,primecell' will match on lots of nodes
> +select:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,coresight-tnoc
> + required:
> + - compatible
> +
> +properties:
> + $nodename:
> + pattern: "^tn(@[0-9a-f]+)$"
> + compatible:
> + items:
> + - const: qcom,coresight-tnoc
> + - const: arm,primecell
> +
> + reg:
> + minItems: 1
> + maxItems: 2
Look how existing bindings do it. You need to list and describe the items.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 1/5] dt-bindings: arm: Add Coresight device Trace NOC definition
2025-02-20 12:25 ` Krzysztof Kozlowski
@ 2025-02-26 11:01 ` Yuanfang Zhang
0 siblings, 0 replies; 15+ messages in thread
From: Yuanfang Zhang @ 2025-02-26 11:01 UTC (permalink / raw)
To: Krzysztof Kozlowski, Suzuki K Poulose, Mike Leach, James Clark,
Alexander Shishkin
Cc: kernel, linux-kernel, coresight, linux-arm-kernel
On 2/20/2025 8:25 PM, Krzysztof Kozlowski wrote:
> On 20/02/2025 10:41, Yuanfang Zhang wrote:
>> Adds new coresight-tnoc.yaml file describing the bindings required
>> to define Trace NOC in the device trees.
>>
>> Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
>
> <form letter>
> Please use scripts/get_maintainers.pl to get a list of necessary people
> and lists to CC. It might happen, that command when run on an older
> kernel, gives you outdated entries. Therefore please be sure you base
> your patches on recent Linux kernel.
>
> Tools like b4 or scripts/get_maintainer.pl provide you proper list of
> people, so fix your workflow. Tools might also fail if you work on some
> ancient tree (don't, instead use mainline) or work on fork of kernel
> (don't, instead use mainline). Just use b4 and everything should be
> fine, although remember about `b4 prep --auto-to-cc` if you added new
> patches to the patchset.
>
> You missed at least devicetree list (maybe more), so this won't be
> tested by automated tooling. Performing review on untested code might be
> a waste of time.
>
> Please kindly resend and include all necessary To/Cc entries.
> </form letter>
>
updated in https://lore.kernel.org/r/20250221-trace-noc-driver-v1-0-0a23fc643217@quicinc.com
>> ---
>> .../bindings/arm/qcom,coresight-tnoc.yaml | 107 +++++++++++++++++++++
>> 1 file changed, 107 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..b8c1aaf014fb483fd960ec55d1193fb3f66136d2
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
>> @@ -0,0 +1,107 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/arm/qcom,coresight-tnoc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Ttrace NOC(Network On Chip)
>> +
>> +maintainers:
>> + - yuanfang Zhang <quic_yuanfang@quicinc.com>
>> +
>> +description:
>> + The Trace NoC is an integration hierarchy which is a replacement of Dragonlink tile configuration.
>> + It brings together debug component like TPDA, funnel and interconnect Trace Noc which collects trace
>
> Wrap according to coding style.
>
Done in V2.
>> + from subsystems and transfers to QDSS sink.
>> +
>> + It sits in the different subsystem of SOC and aggregates the trace and transports it to Aggregation TNoC
>> + or to QDSS trace sink eventually. Trace NoC embeds bridges for all the interfaces(APB, ATB, QPMDA & NTS).
>> +
>> + Trace NoC can take inputs from different trace sources i.e. ATB, QPMDA.
>> +
>> +# Need a custom select here or 'arm,primecell' will match on lots of nodes
>> +select:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - qcom,coresight-tnoc
>> + required:
>> + - compatible
>> +
>> +properties:
>> + $nodename:
>> + pattern: "^tn(@[0-9a-f]+)$"
>> + compatible:
>> + items:
>> + - const: qcom,coresight-tnoc
>> + - const: arm,primecell
>> +
>> + reg:
>> + minItems: 1
>> + maxItems: 2
>
> Look how existing bindings do it. You need to list and describe the items.
>
Done in V2.
> Best regards,
> Krzysztof
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 2/5] coresight: add coresight Trace NOC driver
2025-02-20 9:41 [PATCH 0/5] coresight: Add Coresight Trace NOC driver Yuanfang Zhang
2025-02-20 9:41 ` [PATCH 1/5] dt-bindings: arm: Add Coresight device Trace NOC definition Yuanfang Zhang
@ 2025-02-20 9:41 ` Yuanfang Zhang
2025-02-20 9:41 ` [PATCH 3/5] coresight-tnoc: add nodes to configure flush Yuanfang Zhang
` (2 subsequent siblings)
4 siblings, 0 replies; 15+ messages in thread
From: Yuanfang Zhang @ 2025-02-20 9:41 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Alexander Shishkin
Cc: kernel, linux-kernel, coresight, linux-arm-kernel, Yuanfang Zhang
Add driver to support Coresight device Trace NOC(Network On Chip).
Trace NOC is an integration hierarchy which is a replacement of
Dragonlink configuration. It brings together debug components like
TPDA, funnel and interconnect Trace Noc.
It sits in the different subsystem of SOC and aggregates the trace
and transports to QDSS trace bus.
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
---
drivers/hwtracing/coresight/Kconfig | 10 ++
drivers/hwtracing/coresight/Makefile | 1 +
drivers/hwtracing/coresight/coresight-tnoc.c | 191 +++++++++++++++++++++++++++
drivers/hwtracing/coresight/coresight-tnoc.h | 53 ++++++++
4 files changed, 255 insertions(+)
diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
index 06f0a7594169c5f03ca5f893b7debd294587de78..712b2469e37610e6fc5f15cedb2535bf570f99aa 100644
--- a/drivers/hwtracing/coresight/Kconfig
+++ b/drivers/hwtracing/coresight/Kconfig
@@ -247,4 +247,14 @@ config CORESIGHT_DUMMY
To compile this driver as a module, choose M here: the module will be
called coresight-dummy.
+
+config CORESIGHT_TNOC
+ tristate "Coresight Trace Noc driver"
+ help
+ This driver provides support for Trace NoC component.
+ Trace NoC is a interconnect that is used to collect trace from
+ various subsystems and transport it QDSS trace sink.It sits in
+ the different tiles of SOC and aggregates the trace local to the
+ tile and transports it another tile or to QDSS trace sink eventually.
+
endif
diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile
index 4ba478211b318ea5305f9f98dda40a041759f09f..ab1cff8f027495fabe3872d52f8c0877e39f0ea8 100644
--- a/drivers/hwtracing/coresight/Makefile
+++ b/drivers/hwtracing/coresight/Makefile
@@ -51,3 +51,4 @@ coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \
coresight-cti-sysfs.o
obj-$(CONFIG_ULTRASOC_SMB) += ultrasoc-smb.o
obj-$(CONFIG_CORESIGHT_DUMMY) += coresight-dummy.o
+obj-$(CONFIG_CORESIGHT_TNOC) += coresight-tnoc.o
diff --git a/drivers/hwtracing/coresight/coresight-tnoc.c b/drivers/hwtracing/coresight/coresight-tnoc.c
new file mode 100644
index 0000000000000000000000000000000000000000..11b9a7fd1efdc9fff7c1e9666bda14acb41786cb
--- /dev/null
+++ b/drivers/hwtracing/coresight/coresight-tnoc.c
@@ -0,0 +1,191 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/amba/bus.h>
+#include <linux/io.h>
+#include <linux/coresight.h>
+#include <linux/of.h>
+
+#include "coresight-priv.h"
+#include "coresight-tnoc.h"
+#include "coresight-trace-id.h"
+
+static void trace_noc_enable_hw(struct trace_noc_drvdata *drvdata)
+{
+ u32 val;
+
+ /* Set ATID */
+ writel_relaxed(drvdata->atid, drvdata->base + TRACE_NOC_XLD);
+
+ /* Config sync CR */
+ writel_relaxed(0xffff, drvdata->base + TRACE_NOC_SYNCR);
+
+ /* Set frequency value */
+ writel_relaxed(drvdata->freq_req_val, drvdata->base + TRACE_NOC_FREQVAL);
+
+ /* Set Ctrl register */
+ val = readl_relaxed(drvdata->base + TRACE_NOC_CTRL);
+
+ if (drvdata->flag_type == FLAG_TS)
+ val = val | TRACE_NOC_CTRL_FLAGTYPE;
+ else
+ val = val & ~TRACE_NOC_CTRL_FLAGTYPE;
+
+ if (drvdata->freq_type == FREQ_TS)
+ val = val | TRACE_NOC_CTRL_FREQTYPE;
+ else
+ val = val & ~TRACE_NOC_CTRL_FREQTYPE;
+
+ val = val | TRACE_NOC_CTRL_PORTEN;
+ writel_relaxed(val, drvdata->base + TRACE_NOC_CTRL);
+
+ dev_dbg(drvdata->dev, "Trace NOC is enabled\n");
+}
+
+static int trace_noc_enable(struct coresight_device *csdev, struct coresight_connection *inport,
+ struct coresight_connection *outport)
+{
+ struct trace_noc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+ spin_lock(&drvdata->spinlock);
+ if (csdev->refcnt == 0)
+ trace_noc_enable_hw(drvdata);
+
+ csdev->refcnt++;
+ spin_unlock(&drvdata->spinlock);
+
+ return 0;
+}
+
+static void trace_noc_disable_hw(struct trace_noc_drvdata *drvdata)
+{
+ writel_relaxed(0x0, drvdata->base + TRACE_NOC_CTRL);
+ dev_dbg(drvdata->dev, "Trace NOC is disabled\n");
+}
+
+static void trace_noc_disable(struct coresight_device *csdev, struct coresight_connection *inport,
+ struct coresight_connection *outport)
+{
+ struct trace_noc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+ spin_lock(&drvdata->spinlock);
+ if (--csdev->refcnt == 0)
+ trace_noc_disable_hw(drvdata);
+
+ spin_unlock(&drvdata->spinlock);
+ dev_info(drvdata->dev, "Trace NOC is disabled\n");
+}
+
+static const struct coresight_ops_link trace_noc_link_ops = {
+ .enable = trace_noc_enable,
+ .disable = trace_noc_disable,
+};
+
+static const struct coresight_ops trace_noc_cs_ops = {
+ .link_ops = &trace_noc_link_ops,
+};
+
+static int trace_noc_init_default_data(struct trace_noc_drvdata *drvdata)
+{
+ int atid;
+
+ atid = coresight_trace_id_get_system_id();
+ if (atid < 0)
+ return atid;
+
+ drvdata->atid = atid;
+
+ drvdata->freq_type = FREQ_TS;
+ drvdata->flag_type = FLAG;
+ drvdata->freq_req_val = 0;
+
+ return 0;
+}
+
+static int trace_noc_probe(struct amba_device *adev, const struct amba_id *id)
+{
+ struct device *dev = &adev->dev;
+ struct coresight_platform_data *pdata;
+ struct trace_noc_drvdata *drvdata;
+ struct coresight_desc desc = { 0 };
+ int ret;
+
+ desc.name = coresight_alloc_device_name(&trace_noc_devs, dev);
+ if (!desc.name)
+ return -ENOMEM;
+ pdata = coresight_get_platform_data(dev);
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+ adev->dev.platform_data = pdata;
+
+ drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
+ if (!drvdata)
+ return -ENOMEM;
+
+ drvdata->dev = &adev->dev;
+ dev_set_drvdata(dev, drvdata);
+
+ drvdata->base = devm_ioremap_resource(dev, &adev->res);
+ if (!drvdata->base)
+ return -ENOMEM;
+
+ spin_lock_init(&drvdata->spinlock);
+
+ ret = trace_noc_init_default_data(drvdata);
+ if (ret)
+ return ret;
+
+ desc.ops = &trace_noc_cs_ops;
+ desc.type = CORESIGHT_DEV_TYPE_LINK;
+ desc.subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_MERG;
+ desc.pdata = adev->dev.platform_data;
+ desc.dev = &adev->dev;
+ desc.access = CSDEV_ACCESS_IOMEM(drvdata->base);
+ drvdata->csdev = coresight_register(&desc);
+ if (IS_ERR(drvdata->csdev))
+ return PTR_ERR(drvdata->csdev);
+
+ pm_runtime_put(&adev->dev);
+
+ dev_dbg(drvdata->dev, "Trace Noc initialized\n");
+ return 0;
+}
+
+static void trace_noc_remove(struct amba_device *adev)
+{
+ struct trace_noc_drvdata *drvdata = dev_get_drvdata(&adev->dev);
+
+ coresight_trace_id_put_system_id(drvdata->atid);
+ coresight_unregister(drvdata->csdev);
+}
+
+static struct amba_id trace_noc_ids[] = {
+ {
+ .id = 0x000f0c00,
+ .mask = 0x000fff00,
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(amba, trace_noc_ids);
+
+static struct amba_driver trace_noc_driver = {
+ .drv = {
+ .name = "coresight-trace-noc",
+ .owner = THIS_MODULE,
+ .suppress_bind_attrs = true,
+ },
+ .probe = trace_noc_probe,
+ .remove = trace_noc_remove,
+ .id_table = trace_noc_ids,
+};
+
+module_amba_driver(trace_noc_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Trace NOC driver");
diff --git a/drivers/hwtracing/coresight/coresight-tnoc.h b/drivers/hwtracing/coresight/coresight-tnoc.h
new file mode 100644
index 0000000000000000000000000000000000000000..b6bd1ef659897d8e0994c5e8514e8cbdd16eebd8
--- /dev/null
+++ b/drivers/hwtracing/coresight/coresight-tnoc.h
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#define TRACE_NOC_CTRL 0x008
+#define TRACE_NOC_XLD 0x010
+#define TRACE_NOC_FREQVAL 0x018
+#define TRACE_NOC_SYNCR 0x020
+
+/* Enable generation of output ATB traffic.*/
+#define TRACE_NOC_CTRL_PORTEN BIT(0)
+/* Writing 1 to issue a FREQ or FREQ_TS packet*/
+#define TRACE_NOC_CTRL_FREQTSREQ BIT(5)
+/* Sets the type of issued ATB FLAG packets. 0: 'FLAG' packets; 1: 'FLAG_TS' packets.*/
+#define TRACE_NOC_CTRL_FLAGTYPE BIT(7)
+/* sets the type of issued ATB FREQ packets. 0: 'FREQ' packets; 1: 'FREQ_TS' packets.*/
+#define TRACE_NOC_CTRL_FREQTYPE BIT(8)
+DEFINE_CORESIGHT_DEVLIST(trace_noc_devs, "traceNoc");
+
+/**
+ * struct trace_noc_drvdata - specifics associated to a trace noc component
+ * @base: memory mapped base address for this component.
+ * @dev: device node for trace_noc_drvdata.
+ * @csdev: component vitals needed by the framework.
+ * @spinlock: only one at a time pls.
+ * @atid: id for the trace packet.
+ * @freqtype: 0: 'FREQ' packets; 1: 'FREQ_TS' packets.
+ * @flagtype: 0: 'FLAG' packets; 1: 'FLAG_TS' packets.
+ * @freq_req_val: set frequency values carried by 'FREQ' and 'FREQ_TS' packets.
+ */
+struct trace_noc_drvdata {
+ void __iomem *base;
+ struct device *dev;
+ struct coresight_device *csdev;
+ spinlock_t spinlock; /* lock for the drvdata. */
+ u32 atid;
+ u32 freq_type;
+ u32 flag_type;
+ u32 freq_req_val;
+};
+
+/* freq type */
+enum freq_type {
+ FREQ,
+ FREQ_TS,
+};
+
+/* flag type */
+enum flag_type {
+ FLAG,
+ FLAG_TS,
+};
--
2.34.1
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 3/5] coresight-tnoc: add nodes to configure flush
2025-02-20 9:41 [PATCH 0/5] coresight: Add Coresight Trace NOC driver Yuanfang Zhang
2025-02-20 9:41 ` [PATCH 1/5] dt-bindings: arm: Add Coresight device Trace NOC definition Yuanfang Zhang
2025-02-20 9:41 ` [PATCH 2/5] coresight: add coresight Trace NOC driver Yuanfang Zhang
@ 2025-02-20 9:41 ` Yuanfang Zhang
2025-02-20 9:41 ` [PATCH 4/5] coresight-tnoc: add node to configure flag type Yuanfang Zhang
2025-02-20 9:41 ` [PATCH 5/5] coresight-tnoc: add nodes to configure freq packet Yuanfang Zhang
4 siblings, 0 replies; 15+ messages in thread
From: Yuanfang Zhang @ 2025-02-20 9:41 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Alexander Shishkin
Cc: kernel, linux-kernel, coresight, linux-arm-kernel, Yuanfang Zhang
Two nodes for configure flush are added here:
1. flush_req: write 1 to initiates a flush sequence.
2. flush_state: read this node to get flush status. 0: sequence in
progress; 1: sequence has been completed.
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
---
drivers/hwtracing/coresight/coresight-tnoc.c | 73 ++++++++++++++++++++++++++++
drivers/hwtracing/coresight/coresight-tnoc.h | 4 ++
2 files changed, 77 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-tnoc.c b/drivers/hwtracing/coresight/coresight-tnoc.c
index 11b9a7fd1efdc9fff7c1e9666bda14acb41786cb..25962af3850af106f7a8b7e1738ad93d44b81ee7 100644
--- a/drivers/hwtracing/coresight/coresight-tnoc.c
+++ b/drivers/hwtracing/coresight/coresight-tnoc.c
@@ -16,6 +16,78 @@
#include "coresight-tnoc.h"
#include "coresight-trace-id.h"
+static ssize_t flush_req_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t size)
+{
+ struct trace_noc_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ struct coresight_device *csdev = drvdata->csdev;
+ unsigned long val;
+ u32 reg;
+
+ if (kstrtoul(buf, 10, &val))
+ return -EINVAL;
+
+ if (val != 1)
+ return -EINVAL;
+
+ spin_lock(&drvdata->spinlock);
+ if (csdev->refcnt == 0) {
+ spin_unlock(&drvdata->spinlock);
+ return -EPERM;
+ }
+
+ reg = readl_relaxed(drvdata->base + TRACE_NOC_CTRL);
+ reg = reg | TRACE_NOC_CTRL_FLUSHREQ;
+ writel_relaxed(reg, drvdata->base + TRACE_NOC_CTRL);
+
+ spin_unlock(&drvdata->spinlock);
+
+ return size;
+}
+static DEVICE_ATTR_WO(flush_req);
+
+/*
+ * flush-sequence status:
+ * value 0: sequence in progress;
+ * value 1: sequence has been completed.
+ */
+static ssize_t flush_status_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct trace_noc_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ struct coresight_device *csdev = drvdata->csdev;
+ u32 val;
+
+ spin_lock(&drvdata->spinlock);
+ if (csdev->refcnt == 0) {
+ spin_unlock(&drvdata->spinlock);
+ return -EPERM;
+ }
+
+ val = readl_relaxed(drvdata->base + TRACE_NOC_CTRL);
+ spin_unlock(&drvdata->spinlock);
+ return sysfs_emit(buf, "%u\n", BMVAL(val, 2, 2));
+}
+static DEVICE_ATTR_RO(flush_status);
+
+static struct attribute *trace_noc_attrs[] = {
+ &dev_attr_flush_req.attr,
+ &dev_attr_flush_status.attr,
+ NULL,
+};
+
+static struct attribute_group trace_noc_attr_grp = {
+ .attrs = trace_noc_attrs,
+};
+
+static const struct attribute_group *trace_noc_attr_grps[] = {
+ &trace_noc_attr_grp,
+ NULL,
+};
+
static void trace_noc_enable_hw(struct trace_noc_drvdata *drvdata)
{
u32 val;
@@ -142,6 +214,7 @@ static int trace_noc_probe(struct amba_device *adev, const struct amba_id *id)
return ret;
desc.ops = &trace_noc_cs_ops;
+ desc.groups = trace_noc_attr_grps;
desc.type = CORESIGHT_DEV_TYPE_LINK;
desc.subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_MERG;
desc.pdata = adev->dev.platform_data;
diff --git a/drivers/hwtracing/coresight/coresight-tnoc.h b/drivers/hwtracing/coresight/coresight-tnoc.h
index b6bd1ef659897d8e0994c5e8514e8cbdd16eebd8..d0fe8f52709ff4147d66dbf90987595012cfaa4e 100644
--- a/drivers/hwtracing/coresight/coresight-tnoc.h
+++ b/drivers/hwtracing/coresight/coresight-tnoc.h
@@ -10,6 +10,10 @@
/* Enable generation of output ATB traffic.*/
#define TRACE_NOC_CTRL_PORTEN BIT(0)
+/* Writing 1 to initiate a flush sequence.*/
+#define TRACE_NOC_CTRL_FLUSHREQ BIT(1)
+/* 0: sequence in progress; 1: sequence has been completed.*/
+#define TRACE_NOC_CTRL_FLUSHSTATUS BIT(2)
/* Writing 1 to issue a FREQ or FREQ_TS packet*/
#define TRACE_NOC_CTRL_FREQTSREQ BIT(5)
/* Sets the type of issued ATB FLAG packets. 0: 'FLAG' packets; 1: 'FLAG_TS' packets.*/
--
2.34.1
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 4/5] coresight-tnoc: add node to configure flag type
2025-02-20 9:41 [PATCH 0/5] coresight: Add Coresight Trace NOC driver Yuanfang Zhang
` (2 preceding siblings ...)
2025-02-20 9:41 ` [PATCH 3/5] coresight-tnoc: add nodes to configure flush Yuanfang Zhang
@ 2025-02-20 9:41 ` Yuanfang Zhang
2025-02-20 9:41 ` [PATCH 5/5] coresight-tnoc: add nodes to configure freq packet Yuanfang Zhang
4 siblings, 0 replies; 15+ messages in thread
From: Yuanfang Zhang @ 2025-02-20 9:41 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Alexander Shishkin
Cc: kernel, linux-kernel, coresight, linux-arm-kernel, Yuanfang Zhang
flag_type：used to set the type of issued ATB FLAG packets.
0: 'FLAG' packets; 1: 'FLAG_TS' packets.
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
---
drivers/hwtracing/coresight/coresight-tnoc.c | 42 +++++++++++++++++++++++++++-
1 file changed, 41 insertions(+), 1 deletion(-)
diff --git a/drivers/hwtracing/coresight/coresight-tnoc.c b/drivers/hwtracing/coresight/coresight-tnoc.c
index 25962af3850af106f7a8b7e1738ad93d44b81ee7..3ff3504603f66bd595484374f1cdac90c528b665 100644
--- a/drivers/hwtracing/coresight/coresight-tnoc.c
+++ b/drivers/hwtracing/coresight/coresight-tnoc.c
@@ -26,7 +26,7 @@ static ssize_t flush_req_store(struct device *dev,
unsigned long val;
u32 reg;
- if (kstrtoul(buf, 10, &val))
+ if (kstrtoul(buf, 0, &val))
return -EINVAL;
if (val != 1)
@@ -73,9 +73,49 @@ static ssize_t flush_status_show(struct device *dev,
}
static DEVICE_ATTR_RO(flush_status);
+/*
+ * Sets the type of issued ATB FLAG packets:
+ * 0: 'FLAG' packets;
+ * 1: 'FLAG_TS' packets.
+ */
+static ssize_t flag_type_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t size)
+{
+ struct trace_noc_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val;
+
+ if (kstrtoul(buf, 10, &val))
+ return -EINVAL;
+
+ if (val != 1 && val != 0)
+ return -EINVAL;
+
+ spin_lock(&drvdata->spinlock);
+ if (val)
+ drvdata->flag_type = FLAG_TS;
+ else
+ drvdata->flag_type = FLAG;
+ spin_unlock(&drvdata->spinlock);
+
+ return size;
+}
+
+static ssize_t flag_type_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct trace_noc_drvdata *drvdata = dev_get_drvdata(dev->parent);
+
+ return sysfs_emit(buf, "%u\n", drvdata->flag_type);
+}
+static DEVICE_ATTR_RW(flag_type);
+
static struct attribute *trace_noc_attrs[] = {
&dev_attr_flush_req.attr,
&dev_attr_flush_status.attr,
+ &dev_attr_flag_type.attr,
NULL,
};
--
2.34.1
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 5/5] coresight-tnoc: add nodes to configure freq packet
2025-02-20 9:41 [PATCH 0/5] coresight: Add Coresight Trace NOC driver Yuanfang Zhang
` (3 preceding siblings ...)
2025-02-20 9:41 ` [PATCH 4/5] coresight-tnoc: add node to configure flag type Yuanfang Zhang
@ 2025-02-20 9:41 ` Yuanfang Zhang
4 siblings, 0 replies; 15+ messages in thread
From: Yuanfang Zhang @ 2025-02-20 9:41 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Alexander Shishkin
Cc: kernel, linux-kernel, coresight, linux-arm-kernel, Yuanfang Zhang
Three nodes for freq packet config are added here:
1. freq_type: used to set the type of issued ATB FREQ packets.
0: 'FREQ' packets; 1: 'FREQ_TS' packets.
2. freq_req_val: used to set frequency values carried by 'FREQ'
and 'FREQ_TS' packets.
3. freq_ts_req: writing '1' to issue a 'FREQ' or 'FREQ_TS' packet.
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
---
drivers/hwtracing/coresight/coresight-tnoc.c | 97 ++++++++++++++++++++++++++++
1 file changed, 97 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-tnoc.c b/drivers/hwtracing/coresight/coresight-tnoc.c
index 3ff3504603f66bd595484374f1cdac90c528b665..629df98959d1bfb55771376fac2818a48cb9c259 100644
--- a/drivers/hwtracing/coresight/coresight-tnoc.c
+++ b/drivers/hwtracing/coresight/coresight-tnoc.c
@@ -112,10 +112,107 @@ static ssize_t flag_type_show(struct device *dev,
}
static DEVICE_ATTR_RW(flag_type);
+static ssize_t freq_type_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct trace_noc_drvdata *drvdata = dev_get_drvdata(dev->parent);
+
+ return sysfs_emit(buf, "%u\n", drvdata->freq_type);
+}
+
+static ssize_t freq_type_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t size)
+{
+ struct trace_noc_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val;
+
+ if (kstrtoul(buf, 0, &val))
+ return -EINVAL;
+
+ if (val != 1 && val != 0)
+ return -EINVAL;
+
+ spin_lock(&drvdata->spinlock);
+ if (val)
+ drvdata->freq_type = FREQ_TS;
+ else
+ drvdata->freq_type = FREQ;
+ spin_unlock(&drvdata->spinlock);
+
+ return size;
+}
+static DEVICE_ATTR_RW(freq_type);
+
+static ssize_t freq_req_val_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct trace_noc_drvdata *drvdata = dev_get_drvdata(dev->parent);
+
+ return sysfs_emit(buf, "%u\n", drvdata->freq_req_val);
+}
+
+static ssize_t freq_req_val_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t size)
+{
+ struct trace_noc_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val;
+
+ if (kstrtoul(buf, 0, &val))
+ return -EINVAL;
+
+ if (val) {
+ spin_lock(&drvdata->spinlock);
+ drvdata->freq_req_val = val;
+ spin_unlock(&drvdata->spinlock);
+ }
+
+ return size;
+}
+static DEVICE_ATTR_RW(freq_req_val);
+
+static ssize_t freq_ts_req_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t size)
+{
+ struct trace_noc_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ struct coresight_device *csdev = drvdata->csdev;
+ unsigned long val;
+ u32 reg;
+
+ if (kstrtoul(buf, 0, &val))
+ return -EINVAL;
+
+ spin_lock(&drvdata->spinlock);
+ if (csdev->refcnt == 0) {
+ spin_unlock(&drvdata->spinlock);
+ return -EPERM;
+ }
+
+ if (val) {
+ reg = readl_relaxed(drvdata->base + TRACE_NOC_CTRL);
+ reg = reg | TRACE_NOC_CTRL_FREQTSREQ;
+ writel_relaxed(reg, drvdata->base + TRACE_NOC_CTRL);
+ }
+ spin_unlock(&drvdata->spinlock);
+
+ return size;
+}
+static DEVICE_ATTR_WO(freq_ts_req);
+
static struct attribute *trace_noc_attrs[] = {
&dev_attr_flush_req.attr,
&dev_attr_flush_status.attr,
&dev_attr_flag_type.attr,
+ &dev_attr_freq_type.attr,
+ &dev_attr_freq_req_val.attr,
+ &dev_attr_freq_ts_req.attr,
NULL,
};
--
2.34.1
^ permalink raw reply [flat|nested] 15+ messages in thread