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From: "Arnd Bergmann" <arnd@arndb.de>
To: "Geert Uytterhoeven" <geert@linux-m68k.org>
Cc: "Linus Torvalds" <torvalds@linux-foundation.org>,
	soc@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [GIT PULL 3/6] soc: devicetree updates for 6.19
Date: Tue, 16 Dec 2025 15:39:51 +0100	[thread overview]
Message-ID: <1ce00594-66ce-4fa7-b75a-d26dc756541e@app.fastmail.com> (raw)
In-Reply-To: <CAMuHMdUKreg6NcMUK-jvgM=R1Mt=VQPntTrwN-PO-S3fnAUw2A@mail.gmail.com>

On Tue, Dec 16, 2025, at 15:35, Geert Uytterhoeven wrote:
> On Fri, 5 Dec 2025 at 19:28, Arnd Bergmann <arnd@arndb.de> wrote:
>> Three new SoCs got added in existing arm64 chip families:
>>
>>  - Renesas R-Car X5H (R8A78000) is a new generation of automotive SoCs,
>>    based on 16 Cortex-A720 (Armv9.2) cores, which makes the the currently
>>    highest-perforance embedded SoC.
>
> Actually 32 Cortex-A720AE cores, which I believe could indeed reduce to
> 16 cores when enabling dual-core lock-step mode.
>

Sorry about that, I should have looked more closely.

      Arnd

  reply	other threads:[~2025-12-16 14:40 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-05 18:26 [GIT PULL 0/6] soc: " Arnd Bergmann
2025-12-05 18:26 ` [GIT PULL 1/6] soc: defconfig " Arnd Bergmann
2025-12-06  2:00   ` pr-tracker-bot
2025-12-05 18:27 ` [GIT PULL 2/6] soc: arm code changes " Arnd Bergmann
2025-12-06  2:00   ` pr-tracker-bot
2025-12-05 18:28 ` [GIT PULL 3/6] soc: devicetree updates " Arnd Bergmann
2025-12-06  2:01   ` pr-tracker-bot
2025-12-16 14:35   ` Geert Uytterhoeven
2025-12-16 14:39     ` Arnd Bergmann [this message]
2025-12-05 18:28 ` [GIT PULL 4/6] soc: sew SoC familes " Arnd Bergmann
2025-12-06  2:00   ` pr-tracker-bot
2025-12-05 18:29 ` [GIT PULL 5/6] soc: driver updates " Arnd Bergmann
2025-12-06  2:00   ` pr-tracker-bot
2025-12-05 18:33 ` [GIT PULL 6/6] soc: driver updates for 6.19, part 2 Arnd Bergmann
2025-12-06  2:00   ` pr-tracker-bot

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