mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: "Shawn Sung (宋孝謙)" <Shawn.Sung@mediatek.com>
To: "CK Hu (胡俊光)" <ck.hu@mediatek.com>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"angelogioacchino.delregno@collabora.com"
	<angelogioacchino.delregno@collabora.com>,
	"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>,
	"krzysztof.kozlowski+dt@linaro.org"
	<krzysztof.kozlowski+dt@linaro.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"wenst@chromium.org" <wenst@chromium.org>,
	"Jason-JH Lin (林睿祥)" <Jason-JH.Lin@mediatek.com>,
	"Singo Chang (張興國)" <Singo.Chang@mediatek.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"sean@poorly.run" <sean@poorly.run>
Subject: Re: [PATCH v3 07/11] drm/mediatek: Support alpha blending in VDOSYS0
Date: Wed, 29 Nov 2023 09:45:05 +0000	[thread overview]
Message-ID: <1e982a7b2673ac1ee9a7c64b0373e515a4f779d3.camel@mediatek.com> (raw)
In-Reply-To: <efae77be2cf1ffbcf4f4fa3e991b5375bb41664a.camel@mediatek.com>

On Thu, 2023-11-23 at 09:22 +0000, CK Hu (胡俊光) wrote:
> Hi, Hsiao-chien:
> 

----
snip
----

> > @@ -420,14 +496,92 @@ void mtk_ovl_layer_config(struct device *dev,
> > unsigned int idx,
> >  
> >  	overlay_pitch.pitch = pitch;
> >  
> > -	if (!pending->enable) {
> > +	if (!pending->enable || !pending->width || !pending->height) {
> >  		mtk_ovl_layer_off(dev, idx, cmdq_pkt);
> >  		return;
> >  	}
> >  
> > -	con = ovl_fmt_convert(ovl, fmt);
> > -	if (state->base.fb && state->base.fb->format->has_alpha)
> > -		con |= OVL_CON_AEN | OVL_CON_ALPHA;
> > +	con = ovl_fmt_convert(ovl, fmt, blend_mode);
> > +	if (state->base.fb) {
> > +		con |= OVL_CON_AEN;
> 
> It seems all SoC ovl hardware support alpha blending, why in mmsys
> just
> some support?

Because alpha blending was not implemented before, and we only verified
this patch on MT8195 and MT8188. Will review this part again. Thanks.

> > +		con |= state->base.alpha & 0xff;
> > +	}
> > +
> > +	if (blend_mode == DRM_MODE_BLEND_PIXEL_NONE ||
> > +	    (state->base.fb && !state->base.fb->format->has_alpha))
> > +		ignore_pixel_alpha = OVL_CONST_BLEND;
> > +
> > +	/* need to do Y2R and R2R to reduce 10bit data to 8bit for CRC
> > calculation */
> 
> Reducing 10 bit to 8 bit would lose color detail. Just for CRC to
> lose
> this detail? Why not just use 10 bit to calculate CRC?
> 

This is a hardware limitation, OVL will only retrieve 8 bits per
channel for CRC calculation. Although we do limit this function to
8195/8188 only, the color detail will still lose on these platforms if
we must support CRC.

Regards,
Shawn

  reply	other threads:[~2023-11-29  9:45 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-17  6:47 [PATCH v3 00/11] Support IGT in display driver Hsiao Chien Sung
2023-10-17  6:47 ` [PATCH v3 01/11] soc: mediatek: Add register definitions for GCE Hsiao Chien Sung
2023-10-17  6:47 ` [PATCH v3 02/11] soc: mediatek: Disable 9-bit alpha in ETHDR Hsiao Chien Sung
2023-10-17  6:47 ` [PATCH v3 03/11] dt-bindings: display: mediatek: ovl: Modify rules for MT8195/MT8188 Hsiao Chien Sung
2023-10-17 20:19   ` Rob Herring
2023-10-17  6:47 ` [PATCH v3 04/11] drm/mediatek: Add OVL compatible name for MT8195 Hsiao Chien Sung
2023-10-17  6:47 ` [PATCH v3 05/11] drm/mediatek: Set DRM mode configs accordingly Hsiao Chien Sung
2023-11-22  5:50   ` CK Hu (胡俊光)
2023-10-17  6:47 ` [PATCH v3 06/11] drm/mediatek: Support alpha blending in display driver Hsiao Chien Sung
2023-10-17  6:47 ` [PATCH v3 07/11] drm/mediatek: Support alpha blending in VDOSYS0 Hsiao Chien Sung
2023-11-23  9:22   ` CK Hu (胡俊光)
2023-11-29  9:45     ` Shawn Sung (宋孝謙) [this message]
2023-10-17  6:47 ` [PATCH v3 08/11] drm/mediatek: Support alpha blending in VDOSYS1 Hsiao Chien Sung
2023-11-24  6:04   ` CK Hu (胡俊光)
2023-10-17  6:47 ` [PATCH v3 09/11] drm/mediatek: Support CRC in display driver Hsiao Chien Sung
2023-10-17  6:47 ` [PATCH v3 10/11] drm/mediatek: Support CRC in VDOSYS0 Hsiao Chien Sung
2023-11-30  1:19   ` CK Hu (胡俊光)
2023-10-17  6:47 ` [PATCH v3 11/11] drm/mediatek: Support CRC in VDOSYS1 Hsiao Chien Sung

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1e982a7b2673ac1ee9a7c64b0373e515a4f779d3.camel@mediatek.com \
    --to=shawn.sung@mediatek.com \
    --cc=Jason-JH.Lin@mediatek.com \
    --cc=Nancy.Lin@mediatek.com \
    --cc=Singo.Chang@mediatek.com \
    --cc=angelogioacchino.delregno@collabora.com \
    --cc=chunkuang.hu@kernel.org \
    --cc=ck.hu@mediatek.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=matthias.bgg@gmail.com \
    --cc=robh+dt@kernel.org \
    --cc=sean@poorly.run \
    --cc=wenst@chromium.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®