Re: [Q] Looking for an emulation for CMOV* instructions.

["Adam J. Richter" <adam@yggdrasil.com>]

H. Peter Anvin wrote, in response to Andi Kleen:
>You don't need CMPXCHG8B to do efficient inline mutexes.  In fact, the
>pthreads code for i386 uses the same mutexes the kernel does (LOCK INC
>based, I believe), complete with section hacking to make them
>efficiently inlinable -- and then they're put inside a function call.
[...]

	Your comment prompted me to look at
linux-2.5.2-pre11/include/asm-i386/spinlock.h, and I now believe that
the "lock; decb" that it uses for grabbing spinlocks will return an
incorrect success if 255 or more processors are waiting on the same
spinlock.  I don't know if anybody has ever built a shared memory x86
multiprocessor with 257 (not a typo) or more CPU's, but it's possible
to imagine.  It's also possible to imagine this scenario happening
with even just one processor and a preemtable kernel.  I believe that
the current preemtable kernel patch limits the number of preempted
processes to something like four or six, but that's just a temporary
limitation of the current version.

	If we get the point where this scenario really could happen,
then maybe the spin lock counter type should be expanded from one byte
to four.  I think we already assume four byte alignment in
asm-i386/semaphore.h, which uses a four byte count (I think "lock" is
not guaranteed to work across page boundaries).

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