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From: Chris Wright <chrisw@sous-sol.org>
To: linux-kernel@vger.kernel.org
Cc: xen-devel@lists.xensource.com, virtualization@lists.osdl.org,
	Ian Pratt <ian.pratt@xensource.com>,
	Christian Limpach <Christian.Limpach@cl.cam.ac.uk>
Subject: [RFC PATCH 05/35] Add sync bitops
Date: Tue, 21 Mar 2006 22:30:45 -0800	[thread overview]
Message-ID: <20060322063745.064004000@sorel.sous-sol.org> (raw)
In-Reply-To: <20060322063040.960068000@sorel.sous-sol.org>

[-- Attachment #1: 04-synch-ops --]
[-- Type: text/plain, Size: 13204 bytes --]

Add "always lock'd" implementations of set_bit, clear_bit and
change_bit and the corresponding test_and_ functions.  Also add
"always lock'd" implementation of cmpxchg.  These give guaranteed
strong synchronisation and are required for non-SMP kernels running on
an SMP hypervisor.

Signed-off-by: Ian Pratt <ian.pratt@xensource.com>
Signed-off-by: Christian Limpach <Christian.Limpach@cl.cam.ac.uk>
Signed-off-by: Chris Wright <chrisw@sous-sol.org>
---
 include/asm-i386/bitops-fns.h |   97 +++++++++++++++++
 include/asm-i386/bitops.h     |  230 ++++++++++++++++--------------------------
 include/asm-i386/system.h     |   33 ++++++
 3 files changed, 222 insertions(+), 138 deletions(-)

--- xen-subarch-2.6.orig/include/asm-i386/bitops.h
+++ xen-subarch-2.6/include/asm-i386/bitops.h
@@ -24,6 +24,34 @@
 
 #define ADDR (*(volatile long *) addr)
 
+#define __LOCK_PREFIX LOCK_PREFIX
+#define __NAME(name) name
+#define __BARRIER : "memory"
+#include "bitops-fns.h"
+#undef __LOCK_PREFIX
+#undef __NAME
+#undef __BARRIER
+
+#define __LOCK_PREFIX
+#define __NAME(name) __##name
+#define __BARRIER
+#include "bitops-fns.h"
+#undef __LOCK_PREFIX
+#undef __NAME
+#undef __BARRIER
+
+#define __LOCK_PREFIX "lock ; "
+#define __NAME(name) synch_##name
+#define __BARRIER : "memory"
+#include "bitops-fns.h"
+#undef __LOCK_PREFIX
+#undef __NAME
+#undef __BARRIER
+
+#define smp_mb__before_clear_bit()	barrier()
+#define smp_mb__after_clear_bit()	barrier()
+
+#if 0 /* Fool kernel-doc */
 /**
  * set_bit - Atomically set a bit in memory
  * @nr: the bit to set
@@ -39,30 +67,7 @@
  * Note that @nr may be almost arbitrarily large; this function is not
  * restricted to acting on a single-word quantity.
  */
-static inline void set_bit(int nr, volatile unsigned long * addr)
-{
-	__asm__ __volatile__( LOCK_PREFIX
-		"btsl %1,%0"
-		:"+m" (ADDR)
-		:"Ir" (nr));
-}
-
-/**
- * __set_bit - Set a bit in memory
- * @nr: the bit to set
- * @addr: the address to start counting from
- *
- * Unlike set_bit(), this function is non-atomic and may be reordered.
- * If it's called on the same region of memory simultaneously, the effect
- * may be that only one operation succeeds.
- */
-static inline void __set_bit(int nr, volatile unsigned long * addr)
-{
-	__asm__(
-		"btsl %1,%0"
-		:"+m" (ADDR)
-		:"Ir" (nr));
-}
+static inline void set_bit(int nr, volatile unsigned long *addr);
 
 /**
  * clear_bit - Clears a bit in memory
@@ -74,40 +79,7 @@ static inline void __set_bit(int nr, vol
  * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
  * in order to ensure changes are visible on other processors.
  */
-static inline void clear_bit(int nr, volatile unsigned long * addr)
-{
-	__asm__ __volatile__( LOCK_PREFIX
-		"btrl %1,%0"
-		:"+m" (ADDR)
-		:"Ir" (nr));
-}
-
-static inline void __clear_bit(int nr, volatile unsigned long * addr)
-{
-	__asm__ __volatile__(
-		"btrl %1,%0"
-		:"+m" (ADDR)
-		:"Ir" (nr));
-}
-#define smp_mb__before_clear_bit()	barrier()
-#define smp_mb__after_clear_bit()	barrier()
-
-/**
- * __change_bit - Toggle a bit in memory
- * @nr: the bit to change
- * @addr: the address to start counting from
- *
- * Unlike change_bit(), this function is non-atomic and may be reordered.
- * If it's called on the same region of memory simultaneously, the effect
- * may be that only one operation succeeds.
- */
-static inline void __change_bit(int nr, volatile unsigned long * addr)
-{
-	__asm__ __volatile__(
-		"btcl %1,%0"
-		:"+m" (ADDR)
-		:"Ir" (nr));
-}
+static inline void clear_bit(int nr, volatile unsigned long *addr);
 
 /**
  * change_bit - Toggle a bit in memory
@@ -119,13 +91,7 @@ static inline void __change_bit(int nr, 
  * Note that @nr may be almost arbitrarily large; this function is not
  * restricted to acting on a single-word quantity.
  */
-static inline void change_bit(int nr, volatile unsigned long * addr)
-{
-	__asm__ __volatile__( LOCK_PREFIX
-		"btcl %1,%0"
-		:"+m" (ADDR)
-		:"Ir" (nr));
-}
+static inline void change_bit(int nr, volatile unsigned long *addr);
 
 /**
  * test_and_set_bit - Set a bit and return its old value
@@ -136,56 +102,72 @@ static inline void change_bit(int nr, vo
  * It may be reordered on other architectures than x86.
  * It also implies a memory barrier.
  */
-static inline int test_and_set_bit(int nr, volatile unsigned long * addr)
-{
-	int oldbit;
-
-	__asm__ __volatile__( LOCK_PREFIX
-		"btsl %2,%1\n\tsbbl %0,%0"
-		:"=r" (oldbit),"+m" (ADDR)
-		:"Ir" (nr) : "memory");
-	return oldbit;
-}
+static inline int test_and_set_bit(int nr, volatile unsigned long *addr);
 
 /**
- * __test_and_set_bit - Set a bit and return its old value
- * @nr: Bit to set
+ * test_and_clear_bit - Clear a bit and return its old value
+ * @nr: Bit to clear
  * @addr: Address to count from
  *
- * This operation is non-atomic and can be reordered.  
- * If two examples of this operation race, one can appear to succeed
- * but actually fail.  You must protect multiple accesses with a lock.
+ * This operation is atomic and cannot be reordered.
+ * It can be reordered on other architectures other than x86.
+ * It also implies a memory barrier.
  */
-static inline int __test_and_set_bit(int nr, volatile unsigned long * addr)
-{
-	int oldbit;
-
-	__asm__(
-		"btsl %2,%1\n\tsbbl %0,%0"
-		:"=r" (oldbit),"+m" (ADDR)
-		:"Ir" (nr));
-	return oldbit;
-}
+static inline int test_and_clear_bit(int nr, volatile unsigned long *addr);
 
 /**
- * test_and_clear_bit - Clear a bit and return its old value
- * @nr: Bit to clear
+ * test_and_change_bit - Change a bit and return its old value
+ * @nr: Bit to change
  * @addr: Address to count from
  *
- * This operation is atomic and cannot be reordered.
- * It can be reorderdered on other architectures other than x86.
+ * This operation is atomic and cannot be reordered.  
  * It also implies a memory barrier.
  */
-static inline int test_and_clear_bit(int nr, volatile unsigned long * addr)
-{
-	int oldbit;
+static inline int test_and_change_bit(int nr, volatile unsigned long *addr);
 
-	__asm__ __volatile__( LOCK_PREFIX
-		"btrl %2,%1\n\tsbbl %0,%0"
-		:"=r" (oldbit),"+m" (ADDR)
-		:"Ir" (nr) : "memory");
-	return oldbit;
-}
+/**
+ * __set_bit - Set a bit in memory
+ * @nr: the bit to set
+ * @addr: the address to start counting from
+ *
+ * Unlike set_bit(), this function is non-atomic and may be reordered.
+ * If it's called on the same region of memory simultaneously, the effect
+ * may be that only one operation succeeds.
+ */
+static inline void __set_bit(int nr, volatile unsigned long * addr);
+
+/**
+ * __clear_bit - Clear a bit in memory
+ * @nr: the bit to clear
+ * @addr: the address to start counting from
+ *
+ * Unlike clear_bit(), this function is non-atomic and may be reordered.
+ * If it's called on the same region of memory simultaneously, the effect
+ * may be that only one operation succeeds.
+ */
+static inline void __clear_bit(int nr, volatile unsigned long * addr);
+
+/**
+ * __change_bit - Toggle a bit in memory
+ * @nr: the bit to change
+ * @addr: the address to start counting from
+ *
+ * Unlike change_bit(), this function is non-atomic and may be reordered.
+ * If it's called on the same region of memory simultaneously, the effect
+ * may be that only one operation succeeds.
+ */
+static inline void __change_bit(int nr, volatile unsigned long * addr);
+
+/**
+ * __test_and_set_bit - Set a bit and return its old value
+ * @nr: Bit to set
+ * @addr: Address to count from
+ *
+ * This operation is non-atomic and can be reordered.  
+ * If two examples of this operation race, one can appear to succeed
+ * but actually fail.  You must protect multiple accesses with a lock.
+ */
+static inline int __test_and_set_bit(int nr, volatile unsigned long * addr);
 
 /**
  * __test_and_clear_bit - Clear a bit and return its old value
@@ -196,47 +178,19 @@ static inline int test_and_clear_bit(int
  * If two examples of this operation race, one can appear to succeed
  * but actually fail.  You must protect multiple accesses with a lock.
  */
-static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
-{
-	int oldbit;
-
-	__asm__(
-		"btrl %2,%1\n\tsbbl %0,%0"
-		:"=r" (oldbit),"+m" (ADDR)
-		:"Ir" (nr));
-	return oldbit;
-}
-
-/* WARNING: non atomic and it can be reordered! */
-static inline int __test_and_change_bit(int nr, volatile unsigned long *addr)
-{
-	int oldbit;
-
-	__asm__ __volatile__(
-		"btcl %2,%1\n\tsbbl %0,%0"
-		:"=r" (oldbit),"+m" (ADDR)
-		:"Ir" (nr) : "memory");
-	return oldbit;
-}
+static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr);
 
 /**
- * test_and_change_bit - Change a bit and return its old value
+ * __test_and_clear_bit - Change a bit and return its old value
  * @nr: Bit to change
  * @addr: Address to count from
  *
- * This operation is atomic and cannot be reordered.  
- * It also implies a memory barrier.
+ * This operation is non-atomic and can be reordered.  
+ * If two examples of this operation race, one can appear to succeed
+ * but actually fail.  You must protect multiple accesses with a lock.
  */
-static inline int test_and_change_bit(int nr, volatile unsigned long* addr)
-{
-	int oldbit;
-
-	__asm__ __volatile__( LOCK_PREFIX
-		"btcl %2,%1\n\tsbbl %0,%0"
-		:"=r" (oldbit),"+m" (ADDR)
-		:"Ir" (nr) : "memory");
-	return oldbit;
-}
+static inline int __test_and_change_bit(int nr, volatile unsigned long *addr);
+#endif
 
 #if 0 /* Fool kernel-doc since it doesn't do macros yet */
 /**
--- xen-subarch-2.6.orig/include/asm-i386/system.h
+++ xen-subarch-2.6/include/asm-i386/system.h
@@ -263,6 +263,9 @@ static inline unsigned long __xchg(unsig
 #define cmpxchg(ptr,o,n)\
 	((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o),\
 					(unsigned long)(n),sizeof(*(ptr))))
+#define synch_cmpxchg(ptr,o,n)\
+	((__typeof__(*(ptr)))__synch_cmpxchg((ptr),(unsigned long)(o),\
+					(unsigned long)(n),sizeof(*(ptr))))
 #endif
 
 static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
@@ -292,6 +295,36 @@ static inline unsigned long __cmpxchg(vo
 	return old;
 }
 
+#define __LOCK_PREFIX "lock ; "
+static inline unsigned long __synch_cmpxchg(volatile void *ptr,
+					    unsigned long old,
+					    unsigned long new, int size)
+{
+	unsigned long prev;
+	switch (size) {
+	case 1:
+		__asm__ __volatile__(__LOCK_PREFIX "cmpxchgb %b1,%2"
+				     : "=a"(prev)
+				     : "q"(new), "m"(*__xg(ptr)), "0"(old)
+				     : "memory");
+		return prev;
+	case 2:
+		__asm__ __volatile__(__LOCK_PREFIX "cmpxchgw %w1,%2"
+				     : "=a"(prev)
+				     : "r"(new), "m"(*__xg(ptr)), "0"(old)
+				     : "memory");
+		return prev;
+	case 4:
+		__asm__ __volatile__(__LOCK_PREFIX "cmpxchgl %1,%2"
+				     : "=a"(prev)
+				     : "r"(new), "m"(*__xg(ptr)), "0"(old)
+				     : "memory");
+		return prev;
+	}
+	return old;
+}
+#undef __LOCK_PREFIX
+
 #ifndef CONFIG_X86_CMPXCHG
 /*
  * Building a kernel capable running on 80386. It may be necessary to
--- /dev/null
+++ xen-subarch-2.6/include/asm-i386/bitops-fns.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright 1992, Linus Torvalds.
+ */
+
+#ifndef __NAME
+# error "please don't include this file directly"
+#endif
+
+/**
+ * set_bit - Atomically set a bit in memory
+ * @nr: the bit to set
+ * @addr: the address to start counting from
+ */
+static inline void __NAME(set_bit)(int nr, volatile unsigned long *addr)
+{
+	__asm__ __volatile__( __LOCK_PREFIX
+		"btsl %1,%0"
+		:"+m" (ADDR)
+		:"Ir" (nr));
+}
+
+/**
+ * clear_bit - Clears a bit in memory
+ * @nr: Bit to clear
+ * @addr: Address to start counting from
+ */
+static inline void __NAME(clear_bit)(int nr, volatile unsigned long *addr)
+{
+	__asm__ __volatile__( __LOCK_PREFIX
+		"btrl %1,%0"
+		:"+m" (ADDR)
+		:"Ir" (nr));
+}
+
+/**
+ * change_bit - Toggle a bit in memory
+ * @nr: Bit to change
+ * @addr: Address to start counting from
+ */
+static inline void __NAME(change_bit)(int nr, volatile unsigned long *addr)
+{
+	__asm__ __volatile__( __LOCK_PREFIX
+		"btcl %1,%0"
+		:"+m" (ADDR)
+		:"Ir" (nr));
+}
+
+/**
+ * test_and_set_bit - Set a bit and return its old value
+ * @nr: Bit to set
+ * @addr: Address to count from
+ */
+static inline int __NAME(test_and_set_bit)(int nr,
+					   volatile unsigned long *addr)
+{
+	int oldbit;
+
+	__asm__ __volatile__( __LOCK_PREFIX
+		"btsl %2,%1\n\tsbbl %0,%0"
+		:"=r" (oldbit),"+m" (ADDR)
+		:"Ir" (nr) __BARRIER);
+	return oldbit;
+}
+
+/**
+ * test_and_clear_bit - Clear a bit and return its old value
+ * @nr: Bit to clear
+ * @addr: Address to count from
+ */
+static inline int __NAME(test_and_clear_bit)(int nr,
+					     volatile unsigned long *addr)
+{
+	int oldbit;
+
+	__asm__ __volatile__( __LOCK_PREFIX
+		"btrl %2,%1\n\tsbbl %0,%0"
+		:"=r" (oldbit),"+m" (ADDR)
+		:"Ir" (nr) __BARRIER);
+	return oldbit;
+}
+
+/**
+ * test_and_change_bit - Change a bit and return its old value
+ * @nr: Bit to change
+ * @addr: Address to count from
+ */
+static inline int __NAME(test_and_change_bit)(int nr,
+					      volatile unsigned long *addr)
+{
+	int oldbit;
+
+	__asm__ __volatile__( __LOCK_PREFIX
+		"btcl %2,%1\n\tsbbl %0,%0"
+		:"=r" (oldbit),"+m" (ADDR)
+		:"Ir" (nr) __BARRIER);
+	return oldbit;
+}

--

  parent reply	other threads:[~2006-03-22  6:42 UTC|newest]

Thread overview: 112+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-03-22  6:30 [RFC PATCH 00/35] Xen i386 paravirtualization support Chris Wright
2006-03-22  6:30 ` [RFC PATCH 01/35] Add XEN config options and disable unsupported config options Chris Wright
2006-03-22  6:30 ` [RFC PATCH 02/35] Makefile support to build Xen subarch Chris Wright
2006-03-22  6:30 ` [RFC PATCH 03/35] Add Xen interface header files Chris Wright
2006-03-22  6:30 ` [RFC PATCH 04/35] Hypervisor " Chris Wright
2006-03-22  8:28   ` Arjan van de Ven
2006-03-22  9:31     ` Keir Fraser
2006-03-22  9:46       ` Arjan van de Ven
2006-03-22 11:32       ` David Schwartz
2006-03-22 14:29         ` Keir Fraser
2006-03-22  6:30 ` Chris Wright [this message]
2006-03-22  6:30 ` [RFC PATCH 06/35] Add vmlinuz build target Chris Wright
2006-03-22  6:30 ` [RFC PATCH 07/35] Make LOAD_OFFSET defined by subarch Chris Wright
2006-03-22 22:57   ` Dan Hecht
2006-03-27  8:18     ` Gerd Hoffmann
2006-03-22  6:30 ` [RFC PATCH 08/35] Add Xen-specific memory management definitions Chris Wright
2006-03-22  6:30 ` [RFC PATCH 09/35] Change __FIXADDR_TOP to leave room for the hypervisor Chris Wright
2006-03-22 17:27   ` Anthony Liguori
2006-03-22 17:32     ` Chris Wright
2006-03-22  6:30 ` [RFC PATCH 10/35] Add a new head.S start-of-day file for booting on Xen Chris Wright
2006-03-22 13:43   ` Andi Kleen
2006-03-22 18:58     ` Chris Wright
2006-03-22 18:45       ` Andi Kleen
2006-03-22 19:26         ` Chris Wright
2006-03-22  6:30 ` [RFC PATCH 11/35] Add support for Xen to entry.S Chris Wright
2006-03-22 13:55   ` Andi Kleen
2006-03-22 17:24     ` [Xen-devel] " Zachary Amsden
2006-03-22  6:30 ` [RFC PATCH 12/35] Add start-of-day setup hooks to subarch Chris Wright
2006-03-22  6:30 ` [RFC PATCH 13/35] Support loading an initrd when running on Xen Chris Wright
2006-03-22 14:22   ` Andi Kleen
2006-03-22 19:20     ` Chris Wright
2006-03-22  6:30 ` [RFC PATCH 14/35] subarch modify CPU capabilities Chris Wright
2006-03-22  8:35   ` [Xen-devel] " Zachary Amsden
2006-03-22  9:33     ` Keir Fraser
2006-03-22 19:29       ` Chris Wright
2006-03-22  6:30 ` [RFC PATCH 15/35] subarch support for controlling interrupt delivery Chris Wright
2006-03-22  6:30 ` [RFC PATCH 16/35] subarch support for interrupt and exception gates Chris Wright
2006-03-22 13:45   ` Andi Kleen
2006-03-22 20:54     ` Chris Wright
2006-03-22  6:30 ` [RFC PATCH 17/35] Segment register changes for Xen Chris Wright
2006-03-22 14:24   ` Andi Kleen
2006-03-22 19:33     ` Chris Wright
2006-03-23  0:16   ` Zachary Amsden
2006-03-22  6:30 ` [RFC PATCH 18/35] Support gdt/idt/ldt handling on Xen Chris Wright
2006-03-22 14:30   ` Andi Kleen
2006-03-22 17:51     ` [Xen-devel] " Zachary Amsden
2006-03-22 17:36       ` Andi Kleen
2006-03-22  6:30 ` [RFC PATCH 19/35] subarch support for control register accesses Chris Wright
2006-03-22  8:55   ` Zachary Amsden
2006-03-22 21:45     ` Chris Wright
2006-03-22  6:31 ` [RFC PATCH 20/35] subarch stack pointer update Chris Wright
2006-03-22  6:31 ` [RFC PATCH 21/35] subarch TLB support Chris Wright
2006-03-22  6:31 ` [RFC PATCH 22/35] subarch suport for idle loop (NO_IDLE_HZ for Xen) Chris Wright
2006-03-22  6:31 ` [RFC PATCH 23/35] Add support for Xen event channels Chris Wright
2006-03-22  8:36   ` Arjan van de Ven
2006-03-22 11:30     ` Keir Fraser
2006-03-22 14:07   ` Andi Kleen
2006-03-22  6:31 ` [RFC PATCH 24/35] subarch support for mask value for irq nubmers Chris Wright
2006-03-22  6:31 ` [RFC PATCH 25/35] Add Xen time abstractions Chris Wright
2006-03-22  8:38   ` Arjan van de Ven
2006-03-22 19:37     ` Chris Wright
2006-03-22 22:26       ` [Xen-devel] " Dan Hecht
2006-03-23  3:23   ` [Xen-devel] " Eli Collins
2006-03-23  6:47     ` Chris Wright
2006-03-22  6:31 ` [RFC PATCH 26/35] Add Xen subarch reboot support Chris Wright
2006-03-22  8:40   ` Arjan van de Ven
2006-03-22 10:22     ` Keir Fraser
2006-03-22 10:39       ` Arjan van de Ven
2006-03-22 10:52         ` Keir Fraser
2006-03-22 14:21   ` Andi Kleen
2006-03-22 20:59     ` Pavel Machek
2006-03-22  6:31 ` [RFC PATCH 27/35] Add nosegneg capability to the vsyscall page notes Chris Wright
2006-03-22  6:31 ` [RFC PATCH 28/35] add support for Xen feature queries Chris Wright
2006-03-22  8:42   ` Arjan van de Ven
2006-03-22  6:31 ` [RFC PATCH 29/35] Add the Xen virtual console driver Chris Wright
2006-03-22  8:43   ` Arjan van de Ven
2006-03-22  9:29     ` Keir Fraser
2006-03-22 14:17   ` Andi Kleen
2006-03-22 16:00   ` Anthony Liguori
2006-03-22 16:07     ` Keir Fraser
2006-03-22 16:14       ` Anthony Liguori
2006-03-22  6:31 ` [RFC PATCH 30/35] Add generic_page_range() function Chris Wright
2006-03-22  8:51   ` Zachary Amsden
2006-03-22  9:27     ` [Xen-devel] " Keir Fraser
2006-03-22 11:21   ` Nick Piggin
2006-03-22 14:33     ` Keir Fraser
2006-03-22 15:35       ` Keir Fraser
2006-03-23  0:15         ` Nick Piggin
2006-03-23  0:26       ` Nick Piggin
2006-03-22  6:31 ` [RFC PATCH 31/35] Add Xen grant table support Chris Wright
2006-03-22  8:45   ` Arjan van de Ven
2006-03-22 18:38     ` Chris Wright
2006-03-22  6:31 ` [RFC PATCH 32/35] Add Xen driver utility functions Chris Wright
2006-03-22 14:12   ` Andi Kleen
2006-03-22  6:31 ` [RFC PATCH 33/35] Add the Xenbus sysfs and virtual device hotplug driver Chris Wright
2006-03-22  8:53   ` Arjan van de Ven
2006-03-22 11:14     ` Keir Fraser
2006-03-22  6:31 ` [RFC PATCH 34/35] Add the Xen virtual network device driver Chris Wright
2006-03-22  8:59   ` Arjan van de Ven
2006-03-22 15:29   ` James Morris
2006-03-22 17:17   ` Stephen Hemminger
2006-03-22  6:31 ` [RFC PATCH 35/35] Add Xen virtual block " Chris Wright
2006-03-22 16:39   ` Anthony Liguori
2006-03-22 16:54     ` Christoph Hellwig
2006-03-27  8:42     ` Gerd Hoffmann
2006-03-22 17:15 ` [RFC PATCH 00/35] Xen i386 paravirtualization support Anthony Liguori
2006-03-22 17:27   ` Chris Wright
2006-03-22 17:50     ` Anthony Liguori
2006-05-09  8:49 Chris Wright
2006-05-09  7:00 ` [RFC PATCH 05/35] Add sync bitops Chris Wright
2006-05-09 22:56   ` Christoph Lameter
2006-05-09 23:04     ` Andi Kleen
2006-05-09 23:07     ` Chris Wright

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