From: Andi Kleen <ak@suse.de>
To: andreas.herrmann3@amd.com, linux-kernel@vger.kernel.org
Subject: [PATCH] [11/20] x86: Use the correct cpuid method to detect MWAIT support for C states
Date: Thu, 3 Jan 2008 01:50:06 +0100 (CET) [thread overview]
Message-ID: <20080103005006.BE79A14D40@wotan.suse.de> (raw)
In-Reply-To: <20080103149.088038000@suse.de>
Previously there was a AMD specific quirk to handle the case of
AMD Fam10h MWAIT not supporting any C states. But it turns out
that CPUID already has ways to detectly detect that without
using special quirks.
The new code simply checks if MWAIT supports at least C1 and doesn't
use it if it doesn't. No more vendor specific code.
Credit goes to Ben Serebrin for pointing out the (nearly) obvious.
Cc: "Andreas Herrmann" <andreas.herrmann3@amd.com>
Signed-off-by: Andi Kleen <ak@suse.de>
---
arch/x86/kernel/cpu/amd.c | 3 ---
arch/x86/kernel/process_32.c | 10 +++++++++-
arch/x86/kernel/process_64.c | 11 ++++++++++-
arch/x86/kernel/setup_64.c | 4 ----
4 files changed, 19 insertions(+), 9 deletions(-)
Index: linux/arch/x86/kernel/cpu/amd.c
===================================================================
--- linux.orig/arch/x86/kernel/cpu/amd.c
+++ linux/arch/x86/kernel/cpu/amd.c
@@ -295,9 +295,6 @@ static void __cpuinit init_amd(struct cp
local_apic_timer_disabled = 1;
#endif
- if (c->x86 == 0x10 && !force_mwait)
- clear_bit(X86_FEATURE_MWAIT, c->x86_capability);
-
/* K6s reports MCEs but don't actually have all the MSRs */
if (c->x86 < 6)
clear_bit(X86_FEATURE_MCE, c->x86_capability);
Index: linux/arch/x86/kernel/process_32.c
===================================================================
--- linux.orig/arch/x86/kernel/process_32.c
+++ linux/arch/x86/kernel/process_32.c
@@ -271,9 +271,17 @@ static void mwait_idle(void)
mwait_idle_with_hints(0, 0);
}
+static int mwait_usable(const struct cpuinfo_x86 *c)
+{
+ if (force_mwait)
+ return 1;
+ /* Any C1 states supported? */
+ return c->cpuid_level >= 5 && ((cpuid_edx(5) >> 4) & 0xf) > 0;
+}
+
void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
{
- if (cpu_has(c, X86_FEATURE_MWAIT)) {
+ if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
printk("monitor/mwait feature present.\n");
/*
* Skip, if setup has overridden idle.
Index: linux/arch/x86/kernel/process_64.c
===================================================================
--- linux.orig/arch/x86/kernel/process_64.c
+++ linux/arch/x86/kernel/process_64.c
@@ -270,10 +270,19 @@ static void mwait_idle(void)
}
}
+
+static int mwait_usable(const struct cpuinfo_x86 *c)
+{
+ if (force_mwait)
+ return 1;
+ /* Any C1 states supported? */
+ return c->cpuid_level >= 5 && ((cpuid_edx(5) >> 4) & 0xf) > 0;
+}
+
void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
{
static int printed;
- if (cpu_has(c, X86_FEATURE_MWAIT)) {
+ if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
/*
* Skip, if setup has overridden idle.
* One CPU supports mwait => All CPUs supports mwait
Index: linux/arch/x86/kernel/setup_64.c
===================================================================
--- linux.orig/arch/x86/kernel/setup_64.c
+++ linux/arch/x86/kernel/setup_64.c
@@ -760,10 +760,6 @@ static void __cpuinit init_amd(struct cp
/* MFENCE stops RDTSC speculation */
set_cpu_cap(c, X86_FEATURE_MFENCE_RDTSC);
- /* Family 10 doesn't support C states in MWAIT so don't use it */
- if (c->x86 == 0x10 && !force_mwait)
- clear_cpu_cap(c, X86_FEATURE_MWAIT);
-
if (amd_apic_timer_broken())
disable_apic_timer = 1;
}
next prev parent reply other threads:[~2008-01-03 0:53 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-01-03 0:49 [PATCH] [1/20] x86: Make ptrace.h safe to include from assembler code Andi Kleen
2008-01-03 0:49 ` [PATCH] [2/20] x86: Implement support to synchronize RDTSC through MFENCE on AMD CPUs Andi Kleen
2008-01-03 0:49 ` [PATCH] [3/20] x86: Implement support to synchronize RDTSC with LFENCE on Intel CPUs Andi Kleen
2008-01-03 0:49 ` [PATCH] [4/20] x86: Move nop declarations into separate include file Andi Kleen
2008-01-03 0:50 ` [PATCH] [5/20] x86: Introduce nsec_barrier() Andi Kleen
2008-01-03 10:47 ` Ingo Molnar
2008-01-03 12:55 ` Andi Kleen
2008-01-07 20:01 ` [PATCH] [5/20] x86: Introduce nsec_barrier() II Andi Kleen
2008-01-03 0:50 ` [PATCH] [6/20] x86: Remove get_cycles_sync Andi Kleen
2008-01-03 0:50 ` [PATCH] [7/20] x86: Remove the now unused X86_FEATURE_SYNC_RDTSC Andi Kleen
2008-01-03 0:50 ` [PATCH] [8/20] x86: Make TIF_MCE_NOTIFY optional Andi Kleen
2008-01-03 0:50 ` [PATCH] [9/20] x86: Don't use oops_begin in 64bit mce code Andi Kleen
2008-01-03 10:39 ` Ingo Molnar
2008-01-03 12:52 ` Andi Kleen
2008-01-03 0:50 ` [PATCH] [10/20] i386: Move MWAIT idle check to generic CPU initialization Andi Kleen
2008-01-03 10:42 ` Ingo Molnar
2008-01-03 0:50 ` Andi Kleen [this message]
2008-01-03 10:45 ` [PATCH] [11/20] x86: Use the correct cpuid method to detect MWAIT support for C states Ingo Molnar
2008-01-03 12:53 ` Andi Kleen
2008-01-03 0:50 ` [PATCH] [12/20] x86: Use a per cpu timer for correctable machine check checking Andi Kleen
2008-01-03 10:49 ` Ingo Molnar
2008-01-03 12:56 ` Andi Kleen
2008-01-03 0:50 ` [PATCH] [13/20] x86: Use a deferrable timer for the correctable machine check poller Andi Kleen
2008-01-03 0:50 ` [PATCH] [14/20] x86: Add per cpu counters for machine check polls / machine check events Andi Kleen
2008-01-03 0:50 ` [PATCH] [15/20] x86: Move X86_FEATURE_CONSTANT_TSC into early cpu feature detection Andi Kleen
2008-01-03 11:03 ` Ingo Molnar
2008-01-03 0:50 ` [PATCH] [16/20] x86: Allow TSC clock source on AMD Fam10h and some cleanup Andi Kleen
2008-01-04 8:38 ` Ingo Molnar
2008-01-03 0:50 ` [PATCH] [17/20] x86: Remove explicit C3 TSC check on 64bit Andi Kleen
2008-01-04 8:38 ` Ingo Molnar
2008-01-03 0:50 ` [PATCH] [18/20] x86: Don't disable TSC in any C states on AMD Fam10h Andi Kleen
2008-01-04 8:40 ` Ingo Molnar
2008-01-03 0:50 ` [PATCH] [19/20] x86: Use shorter addresses in i386 segfault printks Andi Kleen
2008-01-03 10:56 ` Ingo Molnar
2008-01-03 12:56 ` Andi Kleen
2008-01-03 0:50 ` [PATCH] [20/20] x86: Print which shared library/executable faulted in segfault etc. messages Andi Kleen
2008-01-03 6:28 ` Eric Dumazet
2008-01-03 11:00 ` Ingo Molnar
2008-01-03 13:06 ` Andi Kleen
2008-01-03 9:54 ` [PATCH] [1/20] x86: Make ptrace.h safe to include from assembler code Ingo Molnar
2008-01-03 12:57 ` Andi Kleen
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