mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
* [PATCH 1/2] gpio-ml-ioh: fix a bug in the interrupt handler
@ 2011-12-13 15:53 Feng Tang
  2011-12-13 15:53 ` [PATCH 2/2] gpio-ml-ioh: Add the irq_disable/irq_enable hooks for ml-ioh irq chip Feng Tang
  2011-12-13 18:05 ` [PATCH 1/2] gpio-ml-ioh: fix a bug in the interrupt handler Grant Likely
  0 siblings, 2 replies; 5+ messages in thread
From: Feng Tang @ 2011-12-13 15:53 UTC (permalink / raw)
  To: grant.likely, linus.walleij, tomoya-linux, linux-kernel
  Cc: joel.clark, ying.huang, qi.wang, kok.howg.ewe, Feng Tang

GPIO's irq action's dev_id is set to the first struct ioh_gpio chip,
so when loop checking the 8 chips, the "chip" should be changed
according.

Signed-off-by: Feng Tang <feng.tang@intel.com>
---
 drivers/gpio/gpio-ml-ioh.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/gpio/gpio-ml-ioh.c b/drivers/gpio/gpio-ml-ioh.c
index ea8e738..92b6f51 100644
--- a/drivers/gpio/gpio-ml-ioh.c
+++ b/drivers/gpio/gpio-ml-ioh.c
@@ -339,7 +339,7 @@ static irqreturn_t ioh_gpio_handler(int irq, void *dev_id)
 	int i, j;
 	int ret = IRQ_NONE;
 
-	for (i = 0; i < 8; i++) {
+	for (i = 0; i < 8; i++, chip++) {
 		reg_val = ioread32(&chip->reg->regs[i].istatus);
 		for (j = 0; j < num_ports[i]; j++) {
 			if (reg_val & BIT(j)) {
-- 
1.7.1


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 2/2] gpio-ml-ioh: Add the irq_disable/irq_enable hooks for ml-ioh irq chip
  2011-12-13 15:53 [PATCH 1/2] gpio-ml-ioh: fix a bug in the interrupt handler Feng Tang
@ 2011-12-13 15:53 ` Feng Tang
  2011-12-13 18:05   ` Grant Likely
  2011-12-13 18:05 ` [PATCH 1/2] gpio-ml-ioh: fix a bug in the interrupt handler Grant Likely
  1 sibling, 1 reply; 5+ messages in thread
From: Feng Tang @ 2011-12-13 15:53 UTC (permalink / raw)
  To: grant.likely, linus.walleij, tomoya-linux, linux-kernel
  Cc: joel.clark, ying.huang, qi.wang, kok.howg.ewe, Feng Tang

These hooks will be needed by the general disabl/enable_irq();

Signed-off-by: Feng Tang <feng.tang@intel.com>
---
 drivers/gpio/gpio-ml-ioh.c |   30 ++++++++++++++++++++++++++++++
 1 files changed, 30 insertions(+), 0 deletions(-)

diff --git a/drivers/gpio/gpio-ml-ioh.c b/drivers/gpio/gpio-ml-ioh.c
index 92b6f51..461958f 100644
--- a/drivers/gpio/gpio-ml-ioh.c
+++ b/drivers/gpio/gpio-ml-ioh.c
@@ -332,6 +332,34 @@ static void ioh_irq_mask(struct irq_data *d)
 		  &chip->reg->regs[chip->ch].imask);
 }
 
+static void ioh_irq_disable(struct irq_data *d)
+{
+	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
+	struct ioh_gpio *chip = gc->private;
+	unsigned long flags;
+	u32 ien;
+
+	spin_lock_irqsave(&chip->spinlock, flags);
+	ien = ioread32(&chip->reg->regs[chip->ch].ien);
+	ien &= ~(1 << (d->irq - chip->irq_base));
+	iowrite32(ien, &chip->reg->regs[chip->ch].ien);
+	spin_unlock_irqrestore(&chip->spinlock, flags);
+}
+
+static void ioh_irq_enable(struct irq_data *d)
+{
+	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
+	struct ioh_gpio *chip = gc->private;
+	unsigned long flags;
+	u32 ien;
+
+	spin_lock_irqsave(&chip->spinlock, flags);
+	ien = ioread32(&chip->reg->regs[chip->ch].ien);
+	ien |= 1 << (d->irq - chip->irq_base);
+	iowrite32(ien, &chip->reg->regs[chip->ch].ien);
+	spin_unlock_irqrestore(&chip->spinlock, flags);
+}
+
 static irqreturn_t ioh_gpio_handler(int irq, void *dev_id)
 {
 	struct ioh_gpio *chip = dev_id;
@@ -370,6 +398,8 @@ static __devinit void ioh_gpio_alloc_generic_chip(struct ioh_gpio *chip,
 	ct->chip.irq_mask = ioh_irq_mask;
 	ct->chip.irq_unmask = ioh_irq_unmask;
 	ct->chip.irq_set_type = ioh_irq_type;
+	ct->chip.irq_disable = ioh_irq_disable;
+	ct->chip.irq_enable = ioh_irq_enable;
 
 	irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
 			       IRQ_NOREQUEST | IRQ_NOPROBE, 0);
-- 
1.7.1


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] gpio-ml-ioh: Add the irq_disable/irq_enable hooks for ml-ioh irq chip
  2011-12-13 15:53 ` [PATCH 2/2] gpio-ml-ioh: Add the irq_disable/irq_enable hooks for ml-ioh irq chip Feng Tang
@ 2011-12-13 18:05   ` Grant Likely
  0 siblings, 0 replies; 5+ messages in thread
From: Grant Likely @ 2011-12-13 18:05 UTC (permalink / raw)
  To: Feng Tang
  Cc: linus.walleij, tomoya-linux, linux-kernel, joel.clark,
	ying.huang, qi.wang, kok.howg.ewe

On Tue, Dec 13, 2011 at 11:53:50PM +0800, Feng Tang wrote:
> These hooks will be needed by the general disabl/enable_irq();
> 
> Signed-off-by: Feng Tang <feng.tang@intel.com>

Applied, thanks

g.

> ---
>  drivers/gpio/gpio-ml-ioh.c |   30 ++++++++++++++++++++++++++++++
>  1 files changed, 30 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-ml-ioh.c b/drivers/gpio/gpio-ml-ioh.c
> index 92b6f51..461958f 100644
> --- a/drivers/gpio/gpio-ml-ioh.c
> +++ b/drivers/gpio/gpio-ml-ioh.c
> @@ -332,6 +332,34 @@ static void ioh_irq_mask(struct irq_data *d)
>  		  &chip->reg->regs[chip->ch].imask);
>  }
>  
> +static void ioh_irq_disable(struct irq_data *d)
> +{
> +	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
> +	struct ioh_gpio *chip = gc->private;
> +	unsigned long flags;
> +	u32 ien;
> +
> +	spin_lock_irqsave(&chip->spinlock, flags);
> +	ien = ioread32(&chip->reg->regs[chip->ch].ien);
> +	ien &= ~(1 << (d->irq - chip->irq_base));
> +	iowrite32(ien, &chip->reg->regs[chip->ch].ien);
> +	spin_unlock_irqrestore(&chip->spinlock, flags);
> +}
> +
> +static void ioh_irq_enable(struct irq_data *d)
> +{
> +	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
> +	struct ioh_gpio *chip = gc->private;
> +	unsigned long flags;
> +	u32 ien;
> +
> +	spin_lock_irqsave(&chip->spinlock, flags);
> +	ien = ioread32(&chip->reg->regs[chip->ch].ien);
> +	ien |= 1 << (d->irq - chip->irq_base);
> +	iowrite32(ien, &chip->reg->regs[chip->ch].ien);
> +	spin_unlock_irqrestore(&chip->spinlock, flags);
> +}
> +
>  static irqreturn_t ioh_gpio_handler(int irq, void *dev_id)
>  {
>  	struct ioh_gpio *chip = dev_id;
> @@ -370,6 +398,8 @@ static __devinit void ioh_gpio_alloc_generic_chip(struct ioh_gpio *chip,
>  	ct->chip.irq_mask = ioh_irq_mask;
>  	ct->chip.irq_unmask = ioh_irq_unmask;
>  	ct->chip.irq_set_type = ioh_irq_type;
> +	ct->chip.irq_disable = ioh_irq_disable;
> +	ct->chip.irq_enable = ioh_irq_enable;
>  
>  	irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
>  			       IRQ_NOREQUEST | IRQ_NOPROBE, 0);
> -- 
> 1.7.1
> 

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/2] gpio-ml-ioh: fix a bug in the interrupt handler
  2011-12-13 15:53 [PATCH 1/2] gpio-ml-ioh: fix a bug in the interrupt handler Feng Tang
  2011-12-13 15:53 ` [PATCH 2/2] gpio-ml-ioh: Add the irq_disable/irq_enable hooks for ml-ioh irq chip Feng Tang
@ 2011-12-13 18:05 ` Grant Likely
  1 sibling, 0 replies; 5+ messages in thread
From: Grant Likely @ 2011-12-13 18:05 UTC (permalink / raw)
  To: Feng Tang
  Cc: linus.walleij, tomoya-linux, linux-kernel, joel.clark,
	ying.huang, qi.wang, kok.howg.ewe

On Tue, Dec 13, 2011 at 11:53:49PM +0800, Feng Tang wrote:
> GPIO's irq action's dev_id is set to the first struct ioh_gpio chip,
> so when loop checking the 8 chips, the "chip" should be changed
> according.
> 
> Signed-off-by: Feng Tang <feng.tang@intel.com>

Applied, thanks.

g.

> ---
>  drivers/gpio/gpio-ml-ioh.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-ml-ioh.c b/drivers/gpio/gpio-ml-ioh.c
> index ea8e738..92b6f51 100644
> --- a/drivers/gpio/gpio-ml-ioh.c
> +++ b/drivers/gpio/gpio-ml-ioh.c
> @@ -339,7 +339,7 @@ static irqreturn_t ioh_gpio_handler(int irq, void *dev_id)
>  	int i, j;
>  	int ret = IRQ_NONE;
>  
> -	for (i = 0; i < 8; i++) {
> +	for (i = 0; i < 8; i++, chip++) {
>  		reg_val = ioread32(&chip->reg->regs[i].istatus);
>  		for (j = 0; j < num_ports[i]; j++) {
>  			if (reg_val & BIT(j)) {
> -- 
> 1.7.1
> 

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 1/2] gpio-ml-ioh: fix a bug in the interrupt handler
@ 2011-11-30  7:51 Feng Tang
  0 siblings, 0 replies; 5+ messages in thread
From: Feng Tang @ 2011-11-30  7:51 UTC (permalink / raw)
  To: grant.likely, tomoya-linux, linux-kernel
  Cc: joel.clark, ying.huang, qi.wang, kok.howg.ewe, Feng Tang

GPIO's irq action's dev_id is set to the first struct ioh_gpio chip,
so when loop checking the 8 chips, the "chip" should be changed
according.

Signed-off-by: Feng Tang <feng.tang@intel.com>
---
 drivers/gpio/gpio-ml-ioh.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/gpio/gpio-ml-ioh.c b/drivers/gpio/gpio-ml-ioh.c
index ea8e738..92b6f51 100644
--- a/drivers/gpio/gpio-ml-ioh.c
+++ b/drivers/gpio/gpio-ml-ioh.c
@@ -339,7 +339,7 @@ static irqreturn_t ioh_gpio_handler(int irq, void *dev_id)
 	int i, j;
 	int ret = IRQ_NONE;
 
-	for (i = 0; i < 8; i++) {
+	for (i = 0; i < 8; i++, chip++) {
 		reg_val = ioread32(&chip->reg->regs[i].istatus);
 		for (j = 0; j < num_ports[i]; j++) {
 			if (reg_val & BIT(j)) {
-- 
1.7.1


^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2011-12-13 18:05 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-12-13 15:53 [PATCH 1/2] gpio-ml-ioh: fix a bug in the interrupt handler Feng Tang
2011-12-13 15:53 ` [PATCH 2/2] gpio-ml-ioh: Add the irq_disable/irq_enable hooks for ml-ioh irq chip Feng Tang
2011-12-13 18:05   ` Grant Likely
2011-12-13 18:05 ` [PATCH 1/2] gpio-ml-ioh: fix a bug in the interrupt handler Grant Likely
  -- strict thread matches above, loose matches on Subject: below --
2011-11-30  7:51 Feng Tang

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®