* [PATCH] ARM: remove asm/locks.h
@ 2012-07-02 20:49 Paul Bolle
2012-07-02 21:52 ` Will Deacon
0 siblings, 1 reply; 6+ messages in thread
From: Paul Bolle @ 2012-07-02 20:49 UTC (permalink / raw)
To: Russell King; +Cc: linux-arm-kernel, linux-kernel
Commit 64ac24e738823161693bf791f87adc802cf529ff ("Generic semaphore
implementation") removed the last include of this header. Apparently it
was just an oversight to keep this header. It can safely be removed now.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
---
Tested only with various git commands on the (history of the) tree.
arch/arm/include/asm/locks.h | 274 ------------------------------------------
1 files changed, 0 insertions(+), 274 deletions(-)
delete mode 100644 arch/arm/include/asm/locks.h
diff --git a/arch/arm/include/asm/locks.h b/arch/arm/include/asm/locks.h
deleted file mode 100644
index ef4c897..0000000
--- a/arch/arm/include/asm/locks.h
+++ /dev/null
@@ -1,274 +0,0 @@
-/*
- * arch/arm/include/asm/locks.h
- *
- * Copyright (C) 2000 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Interrupt safe locking assembler.
- */
-#ifndef __ASM_PROC_LOCKS_H
-#define __ASM_PROC_LOCKS_H
-
-#if __LINUX_ARM_ARCH__ >= 6
-
-#define __down_op(ptr,fail) \
- ({ \
- __asm__ __volatile__( \
- "@ down_op\n" \
-"1: ldrex lr, [%0]\n" \
-" sub lr, lr, %1\n" \
-" strex ip, lr, [%0]\n" \
-" teq ip, #0\n" \
-" bne 1b\n" \
-" teq lr, #0\n" \
-" movmi ip, %0\n" \
-" blmi " #fail \
- : \
- : "r" (ptr), "I" (1) \
- : "ip", "lr", "cc"); \
- smp_mb(); \
- })
-
-#define __down_op_ret(ptr,fail) \
- ({ \
- unsigned int ret; \
- __asm__ __volatile__( \
- "@ down_op_ret\n" \
-"1: ldrex lr, [%1]\n" \
-" sub lr, lr, %2\n" \
-" strex ip, lr, [%1]\n" \
-" teq ip, #0\n" \
-" bne 1b\n" \
-" teq lr, #0\n" \
-" movmi ip, %1\n" \
-" movpl ip, #0\n" \
-" blmi " #fail "\n" \
-" mov %0, ip" \
- : "=&r" (ret) \
- : "r" (ptr), "I" (1) \
- : "ip", "lr", "cc"); \
- smp_mb(); \
- ret; \
- })
-
-#define __up_op(ptr,wake) \
- ({ \
- smp_mb(); \
- __asm__ __volatile__( \
- "@ up_op\n" \
-"1: ldrex lr, [%0]\n" \
-" add lr, lr, %1\n" \
-" strex ip, lr, [%0]\n" \
-" teq ip, #0\n" \
-" bne 1b\n" \
-" cmp lr, #0\n" \
-" movle ip, %0\n" \
-" blle " #wake \
- : \
- : "r" (ptr), "I" (1) \
- : "ip", "lr", "cc"); \
- })
-
-/*
- * The value 0x01000000 supports up to 128 processors and
- * lots of processes. BIAS must be chosen such that sub'ing
- * BIAS once per CPU will result in the long remaining
- * negative.
- */
-#define RW_LOCK_BIAS 0x01000000
-#define RW_LOCK_BIAS_STR "0x01000000"
-
-#define __down_op_write(ptr,fail) \
- ({ \
- __asm__ __volatile__( \
- "@ down_op_write\n" \
-"1: ldrex lr, [%0]\n" \
-" sub lr, lr, %1\n" \
-" strex ip, lr, [%0]\n" \
-" teq ip, #0\n" \
-" bne 1b\n" \
-" teq lr, #0\n" \
-" movne ip, %0\n" \
-" blne " #fail \
- : \
- : "r" (ptr), "I" (RW_LOCK_BIAS) \
- : "ip", "lr", "cc"); \
- smp_mb(); \
- })
-
-#define __up_op_write(ptr,wake) \
- ({ \
- smp_mb(); \
- __asm__ __volatile__( \
- "@ up_op_write\n" \
-"1: ldrex lr, [%0]\n" \
-" adds lr, lr, %1\n" \
-" strex ip, lr, [%0]\n" \
-" teq ip, #0\n" \
-" bne 1b\n" \
-" movcs ip, %0\n" \
-" blcs " #wake \
- : \
- : "r" (ptr), "I" (RW_LOCK_BIAS) \
- : "ip", "lr", "cc"); \
- })
-
-#define __down_op_read(ptr,fail) \
- __down_op(ptr, fail)
-
-#define __up_op_read(ptr,wake) \
- ({ \
- smp_mb(); \
- __asm__ __volatile__( \
- "@ up_op_read\n" \
-"1: ldrex lr, [%0]\n" \
-" add lr, lr, %1\n" \
-" strex ip, lr, [%0]\n" \
-" teq ip, #0\n" \
-" bne 1b\n" \
-" teq lr, #0\n" \
-" moveq ip, %0\n" \
-" bleq " #wake \
- : \
- : "r" (ptr), "I" (1) \
- : "ip", "lr", "cc"); \
- })
-
-#else
-
-#define __down_op(ptr,fail) \
- ({ \
- __asm__ __volatile__( \
- "@ down_op\n" \
-" mrs ip, cpsr\n" \
-" orr lr, ip, #128\n" \
-" msr cpsr_c, lr\n" \
-" ldr lr, [%0]\n" \
-" subs lr, lr, %1\n" \
-" str lr, [%0]\n" \
-" msr cpsr_c, ip\n" \
-" movmi ip, %0\n" \
-" blmi " #fail \
- : \
- : "r" (ptr), "I" (1) \
- : "ip", "lr", "cc"); \
- smp_mb(); \
- })
-
-#define __down_op_ret(ptr,fail) \
- ({ \
- unsigned int ret; \
- __asm__ __volatile__( \
- "@ down_op_ret\n" \
-" mrs ip, cpsr\n" \
-" orr lr, ip, #128\n" \
-" msr cpsr_c, lr\n" \
-" ldr lr, [%1]\n" \
-" subs lr, lr, %2\n" \
-" str lr, [%1]\n" \
-" msr cpsr_c, ip\n" \
-" movmi ip, %1\n" \
-" movpl ip, #0\n" \
-" blmi " #fail "\n" \
-" mov %0, ip" \
- : "=&r" (ret) \
- : "r" (ptr), "I" (1) \
- : "ip", "lr", "cc"); \
- smp_mb(); \
- ret; \
- })
-
-#define __up_op(ptr,wake) \
- ({ \
- smp_mb(); \
- __asm__ __volatile__( \
- "@ up_op\n" \
-" mrs ip, cpsr\n" \
-" orr lr, ip, #128\n" \
-" msr cpsr_c, lr\n" \
-" ldr lr, [%0]\n" \
-" adds lr, lr, %1\n" \
-" str lr, [%0]\n" \
-" msr cpsr_c, ip\n" \
-" movle ip, %0\n" \
-" blle " #wake \
- : \
- : "r" (ptr), "I" (1) \
- : "ip", "lr", "cc"); \
- })
-
-/*
- * The value 0x01000000 supports up to 128 processors and
- * lots of processes. BIAS must be chosen such that sub'ing
- * BIAS once per CPU will result in the long remaining
- * negative.
- */
-#define RW_LOCK_BIAS 0x01000000
-#define RW_LOCK_BIAS_STR "0x01000000"
-
-#define __down_op_write(ptr,fail) \
- ({ \
- __asm__ __volatile__( \
- "@ down_op_write\n" \
-" mrs ip, cpsr\n" \
-" orr lr, ip, #128\n" \
-" msr cpsr_c, lr\n" \
-" ldr lr, [%0]\n" \
-" subs lr, lr, %1\n" \
-" str lr, [%0]\n" \
-" msr cpsr_c, ip\n" \
-" movne ip, %0\n" \
-" blne " #fail \
- : \
- : "r" (ptr), "I" (RW_LOCK_BIAS) \
- : "ip", "lr", "cc"); \
- smp_mb(); \
- })
-
-#define __up_op_write(ptr,wake) \
- ({ \
- __asm__ __volatile__( \
- "@ up_op_write\n" \
-" mrs ip, cpsr\n" \
-" orr lr, ip, #128\n" \
-" msr cpsr_c, lr\n" \
-" ldr lr, [%0]\n" \
-" adds lr, lr, %1\n" \
-" str lr, [%0]\n" \
-" msr cpsr_c, ip\n" \
-" movcs ip, %0\n" \
-" blcs " #wake \
- : \
- : "r" (ptr), "I" (RW_LOCK_BIAS) \
- : "ip", "lr", "cc"); \
- smp_mb(); \
- })
-
-#define __down_op_read(ptr,fail) \
- __down_op(ptr, fail)
-
-#define __up_op_read(ptr,wake) \
- ({ \
- smp_mb(); \
- __asm__ __volatile__( \
- "@ up_op_read\n" \
-" mrs ip, cpsr\n" \
-" orr lr, ip, #128\n" \
-" msr cpsr_c, lr\n" \
-" ldr lr, [%0]\n" \
-" adds lr, lr, %1\n" \
-" str lr, [%0]\n" \
-" msr cpsr_c, ip\n" \
-" moveq ip, %0\n" \
-" bleq " #wake \
- : \
- : "r" (ptr), "I" (1) \
- : "ip", "lr", "cc"); \
- })
-
-#endif
-
-#endif
--
1.7.7.6
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] ARM: remove asm/locks.h
2012-07-02 20:49 [PATCH] ARM: remove asm/locks.h Paul Bolle
@ 2012-07-02 21:52 ` Will Deacon
2012-07-03 7:20 ` Paul Bolle
0 siblings, 1 reply; 6+ messages in thread
From: Will Deacon @ 2012-07-02 21:52 UTC (permalink / raw)
To: Paul Bolle; +Cc: Russell King, linux-kernel, linux-arm-kernel
Hi Paul,
On Mon, Jul 02, 2012 at 09:49:48PM +0100, Paul Bolle wrote:
> Commit 64ac24e738823161693bf791f87adc802cf529ff ("Generic semaphore
> implementation") removed the last include of this header. Apparently it
> was just an oversight to keep this header. It can safely be removed now.
Hmm, looks like you're right!
Acked-by: Will Deacon <will.deacon@arm.com>
> Tested only with various git commands on the (history of the) tree.
Not sure I follow, but since this is all dead code I can't see any tests
failing without it.
Will
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] ARM: remove asm/locks.h
2012-07-02 21:52 ` Will Deacon
@ 2012-07-03 7:20 ` Paul Bolle
2012-07-08 16:03 ` Will Deacon
0 siblings, 1 reply; 6+ messages in thread
From: Paul Bolle @ 2012-07-03 7:20 UTC (permalink / raw)
To: Will Deacon; +Cc: Russell King, linux-kernel, linux-arm-kernel
Will,
On Mon, 2012-07-02 at 22:52 +0100, Will Deacon wrote:
> On Mon, Jul 02, 2012 at 09:49:48PM +0100, Paul Bolle wrote:
> > Tested only with various git commands on the (history of the) tree.
>
> Not sure I follow, but since this is all dead code I can't see any tests
> failing without it.
The purpose of that disclaimer is to stress that only git commands were
used to determine that removing this header is correct and safe. But
perhaps saying that I therefore "tested" this patch with git commands is
confusing.
Paul Bolle
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] ARM: remove asm/locks.h
2012-07-03 7:20 ` Paul Bolle
@ 2012-07-08 16:03 ` Will Deacon
2012-07-08 18:45 ` Paul Bolle
0 siblings, 1 reply; 6+ messages in thread
From: Will Deacon @ 2012-07-08 16:03 UTC (permalink / raw)
To: Paul Bolle; +Cc: Russell King, linux-kernel, linux-arm-kernel
On Tue, Jul 03, 2012 at 08:20:30AM +0100, Paul Bolle wrote:
> On Mon, 2012-07-02 at 22:52 +0100, Will Deacon wrote:
> > Not sure I follow, but since this is all dead code I can't see any tests
> > failing without it.
>
> The purpose of that disclaimer is to stress that only git commands were
> used to determine that removing this header is correct and safe. But
> perhaps saying that I therefore "tested" this patch with git commands is
> confusing.
Okey doke. Please can you put this into the patch system?
Cheers,
Will
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] ARM: remove asm/locks.h
2012-07-08 16:03 ` Will Deacon
@ 2012-07-08 18:45 ` Paul Bolle
2012-07-08 21:57 ` Will Deacon
0 siblings, 1 reply; 6+ messages in thread
From: Paul Bolle @ 2012-07-08 18:45 UTC (permalink / raw)
To: Will Deacon; +Cc: Russell King, linux-kernel, linux-arm-kernel
On Sun, 2012-07-08 at 17:03 +0100, Will Deacon wrote:
> Please can you put this into the patch system?
I'm not sure what the patch system is, but I am certain that I'm not
allowed to put this patch into it.
Paul Bolle
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] ARM: remove asm/locks.h
2012-07-08 18:45 ` Paul Bolle
@ 2012-07-08 21:57 ` Will Deacon
0 siblings, 0 replies; 6+ messages in thread
From: Will Deacon @ 2012-07-08 21:57 UTC (permalink / raw)
To: Paul Bolle; +Cc: Russell King, linux-kernel, linux-arm-kernel
On Sun, Jul 08, 2012 at 07:45:06PM +0100, Paul Bolle wrote:
> On Sun, 2012-07-08 at 17:03 +0100, Will Deacon wrote:
> > Please can you put this into the patch system?
>
> I'm not sure what the patch system is, but I am certain that I'm not
> allowed to put this patch into it.
Don't be so certain -- the patch system is the preferred method for submitting
patches to arch/arm/ via Russell's tree. Since you're not familiar with it,
I've sent the patch for you this time:
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=7460/1
but if you have any additional patches to core ARM code then you can send
them following mailing list review and looking at the help here:
http://www.arm.linux.org.uk/developer/patches/info.php
Note that changes to soc-specific code goes via the arm-soc tree (Arnd and
Olof) so don't use the patch system for that.
Cheers,
Will
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2012-07-08 22:00 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-07-02 20:49 [PATCH] ARM: remove asm/locks.h Paul Bolle
2012-07-02 21:52 ` Will Deacon
2012-07-03 7:20 ` Paul Bolle
2012-07-08 16:03 ` Will Deacon
2012-07-08 18:45 ` Paul Bolle
2012-07-08 21:57 ` Will Deacon
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