From: Borislav Petkov <bp@alien8.de>
To: Andi Kleen <andi@firstfloor.org>
Cc: x86@kernel.org, luto@kernel.org, linux-kernel@vger.kernel.org,
Andi Kleen <ak@linux.intel.com>
Subject: Re: [PATCH 6/8] x86: Enumerate kernel FSGS capability in AT_HWCAP2
Date: Sat, 11 Apr 2015 00:14:18 +0200 [thread overview]
Message-ID: <20150410221418.GD28317@pd.tnic> (raw)
In-Reply-To: <1428681033-1549-7-git-send-email-andi@firstfloor.org>
On Fri, Apr 10, 2015 at 08:50:31AM -0700, Andi Kleen wrote:
> From: Andi Kleen <ak@linux.intel.com>
>
> The kernel needs to explicitely enable RD/WRFSBASE to handle context
> switch correctly. So the application needs to know if it can safely use
> these instruction. Just looking at the CPUID bit is not enough because it
> may be running in a kernel that does not enable the instructions.
>
> One way for the application would be to just try and catch the SIGILL.
> But that is difficult to do in libraries which may not want
> to overwrite the signal handlers of the main application.
>
> So we need to provide a way for the application to discover the kernel
> capability.
>
> I used AT_HWCAP2 in the ELF aux vector which is already used by
> PPC for similar things. We define a new Linux defined bitmap
> returned in AT_HWCAP. Currently it has only one bit set,
> for kernel is FSGSBASE capable.
>
> The application can then access it manually or using
> the getauxval() function in newer glibc.
>
> Signed-off-by: Andi Kleen <ak@linux.intel.com>
> ---
> arch/x86/include/asm/elf.h | 7 +++++++
> arch/x86/include/uapi/asm/hwcap.h | 7 +++++++
> arch/x86/kernel/cpu/common.c | 7 ++++++-
> 3 files changed, 20 insertions(+), 1 deletion(-)
> create mode 100644 arch/x86/include/uapi/asm/hwcap.h
>
> diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
> index ca3347a..47dac31 100644
> --- a/arch/x86/include/asm/elf.h
> +++ b/arch/x86/include/asm/elf.h
> @@ -257,6 +257,13 @@ extern int force_personality32;
>
> #define ELF_HWCAP (boot_cpu_data.x86_capability[0])
>
> +extern unsigned kernel_enabled_features;
> +
> +/* HWCAP2 supplies kernel enabled CPU feature, so that the application
> + can know that it can safely use them. The bits are defined in
> + uapi/asm/hwcap.h. */
Comments formatting.
> +#define ELF_HWCAP2 kernel_enabled_features;
> +
> /* This yields a string that ld.so will use to load implementation
> specific libraries for optimization. This is more specific in
> intent than poking at uname or /proc/cpuinfo.
> diff --git a/arch/x86/include/uapi/asm/hwcap.h b/arch/x86/include/uapi/asm/hwcap.h
> new file mode 100644
> index 0000000..d9c54f8
> --- /dev/null
> +++ b/arch/x86/include/uapi/asm/hwcap.h
> @@ -0,0 +1,7 @@
> +#ifndef _ASM_HWCAP_H
> +#define _ASM_HWCAP_H 1
> +
> +#define HWCAP2_FSGSBASE (1 << 0) /* Kernel enabled RD/WR FS/GS BASE */
BIT()
> +/* upto bit 31 free */
> +
> +#endif
> diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
> index 7df88a3..81186cb 100644
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
> @@ -34,6 +34,7 @@
> #include <asm/i387.h>
> #include <asm/fpu-internal.h>
> #include <asm/mtrr.h>
> +#include <asm/hwcap.h>
> #include <linux/numa.h>
> #include <asm/asm.h>
> #include <asm/cpu.h>
> @@ -49,6 +50,8 @@
>
> #include "cpu.h"
>
> +unsigned kernel_enabled_features __read_mostly;
> +
> /* all of these masks are initialized in setup_cpu_local_masks() */
> cpumask_var_t cpu_initialized_mask;
> cpumask_var_t cpu_callout_mask;
> @@ -958,8 +961,10 @@ static void identify_cpu(struct cpuinfo_x86 *c)
> numa_add_cpu(smp_processor_id());
> #endif
>
> - if (cpu_has(c, X86_FEATURE_FSGSBASE))
> + if (cpu_has(c, X86_FEATURE_FSGSBASE)) {
static_cpu_has_safe()
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
--
next prev parent reply other threads:[~2015-04-10 22:16 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-10 15:50 Updated RD/WRFS/GSBASE patchkit Andi Kleen
2015-04-10 15:50 ` [PATCH 1/8] percpu: Add a DEFINE_PER_CPU_2PAGE_ALIGNED Andi Kleen
2015-04-10 15:50 ` [PATCH 2/8] x86: Naturally align the debug IST stack Andi Kleen
2015-04-10 18:50 ` Andy Lutomirski
2015-04-10 15:50 ` [PATCH 3/8] x86: Add intrinsics/macros for new rd/wr fs/gs base instructions Andi Kleen
2015-04-10 19:06 ` Andy Lutomirski
2015-04-10 19:07 ` Andy Lutomirski
2015-04-10 15:50 ` [PATCH 4/8] x86: Add support for rd/wr fs/gs base Andi Kleen
2015-04-10 19:12 ` Andy Lutomirski
2015-04-10 20:21 ` Andi Kleen
2015-04-10 20:25 ` Borislav Petkov
2015-04-10 20:52 ` Andi Kleen
2015-04-10 20:53 ` Borislav Petkov
2015-04-10 20:34 ` Andy Lutomirski
2015-04-10 20:41 ` Andi Kleen
2015-04-10 20:47 ` Andy Lutomirski
2015-04-10 20:57 ` Andi Kleen
2015-04-10 21:07 ` Andy Lutomirski
2015-04-10 22:52 ` Andi Kleen
2015-04-10 23:00 ` Andy Lutomirski
2015-04-10 23:05 ` Andi Kleen
2015-04-10 23:15 ` Andy Lutomirski
2015-04-10 23:18 ` Andi Kleen
2015-04-10 23:21 ` Andy Lutomirski
2015-04-10 23:16 ` Andi Kleen
2015-04-13 7:07 ` Jan Beulich
2015-04-10 15:50 ` [PATCH 5/8] x86: Make old K8 swapgs workaround conditional Andi Kleen
2015-04-10 21:46 ` Andy Lutomirski
2015-04-10 22:01 ` Borislav Petkov
2015-04-10 23:10 ` Andi Kleen
2015-04-11 7:18 ` Borislav Petkov
2015-04-10 15:50 ` [PATCH 6/8] x86: Enumerate kernel FSGS capability in AT_HWCAP2 Andi Kleen
2015-04-10 19:15 ` Andy Lutomirski
2015-04-10 22:14 ` Borislav Petkov [this message]
2015-04-10 23:07 ` Andi Kleen
2015-04-10 23:08 ` Andi Kleen
2015-04-11 7:16 ` Borislav Petkov
2015-04-11 8:35 ` Intel FSGSBASE support (was: Re: [PATCH 6/8] x86: Enumerate kernel FSGS capability in AT_HWCAP2) Ingo Molnar
2015-04-10 15:50 ` [PATCH 7/8] x86: Add documentation for rd/wr fs/gs base Andi Kleen
2015-04-10 19:17 ` Andy Lutomirski
2015-04-10 20:22 ` Andi Kleen
2015-04-10 20:38 ` Andy Lutomirski
2015-04-10 20:46 ` Andi Kleen
2015-04-10 20:52 ` Andy Lutomirski
2015-04-10 15:50 ` [PATCH 8/8] x86: Use rd/wr fs/gs base in arch_prctl Andi Kleen
2015-04-10 19:19 ` Andy Lutomirski
2015-04-10 19:58 ` Andi Kleen
-- strict thread matches above, loose matches on Subject: below --
2014-11-10 23:55 [PATCH 1/8] percpu: Add a DEFINE_PER_CPU_2PAGE_ALIGNED Andi Kleen
2014-11-10 23:55 ` [PATCH 6/8] x86: Enumerate kernel FSGS capability in AT_HWCAP2 Andi Kleen
2014-10-15 5:11 [PATCH 1/8] percpu: Add a DEFINE_PER_CPU_2PAGE_ALIGNED Andi Kleen
2014-10-15 5:11 ` [PATCH 6/8] x86: Enumerate kernel FSGS capability in AT_HWCAP2 Andi Kleen
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