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* [PATCH v2] pinctrl: sunxi: H3 requires irq_read_needs_mux
@ 2016-02-03  7:57 Krzysztof Adamski
  2016-02-05 13:39 ` Linus Walleij
  0 siblings, 1 reply; 5+ messages in thread
From: Krzysztof Adamski @ 2016-02-03  7:57 UTC (permalink / raw)
  Cc: Linus Walleij, Maxime Ripard, Chen-Yu Tsai, Hans de Goede,
	Lee Jones, Rob Herring, Jens Kuske, Fabian Frederick,
	Vishnu Patekar, linux-gpio, linux-arm-kernel, linux-kernel,
	linux-sunxi

It seems that on H3, just like on A10, when GPIOs are configured as
external interrupt data registers does not contain their value.  When
value is read, GPIO function must be temporary switched to input for
reads.

Signed-off-by: Krzysztof Adamski <k@japko.eu>
---

Changes compared to v1:
- None, but the patch was sent with wrong "From:", if you want to apply 
  it, please apply this one. Sorry for confusion.


 drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
index 77d4cf0..11760bb 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
@@ -492,6 +492,7 @@ static const struct sunxi_pinctrl_desc sun8i_h3_pinctrl_data = {
 	.pins = sun8i_h3_pins,
 	.npins = ARRAY_SIZE(sun8i_h3_pins),
 	.irq_banks = 2,
+	.irq_read_needs_mux = true
 };
 
 static int sun8i_h3_pinctrl_probe(struct platform_device *pdev)
-- 
2.4.2

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2016-02-11 13:29 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-02-03  7:57 [PATCH v2] pinctrl: sunxi: H3 requires irq_read_needs_mux Krzysztof Adamski
2016-02-05 13:39 ` Linus Walleij
2016-02-05 13:43   ` Krzysztof Adamski
2016-02-05 13:51   ` Chen-Yu Tsai
2016-02-11 13:28     ` Linus Walleij

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