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* Re: [linux-sunxi] Re: [PATCH v3 04/10] clk: sunxi-ng: add support for Allwinner H5 SoC
       [not found] <20170207000838.8UJeKISe@smtp2p.mail.yandex.net>
@ 2017-02-07 15:56 ` Maxime Ripard
  0 siblings, 0 replies; only message in thread
From: Maxime Ripard @ 2017-02-07 15:56 UTC (permalink / raw)
  To: Icenowy Zheng
  Cc: Jaroslav Kysela, Vinod Koul, linux-gpio, dmaengine, Chen-Yu Tsai,
	linux-kernel, linux-clk, Andre Przywara, devicetree, Mark Brown,
	alsa-devel, Linus Walleij, linux-arm-kernel, linux-sunxi

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On Mon, Jan 30, 2017 at 10:02:04PM +0800, Icenowy Zheng wrote:
> > >  static struct ccu_reset_map sunxi_h3_h5_ccu_resets[] = { 
> > >  [RST_USB_PHY0] =  { 0x0cc, BIT(0) }, 
> > >  [RST_USB_PHY1] =  { 0x0cc, BIT(1) }, 
> > > @@ -791,6 +910,7 @@ static struct ccu_reset_map sunxi_h3_h5_ccu_resets[] = { 
> > >  [RST_BUS_UART2] =  { 0x2d8, BIT(18) }, 
> > >  [RST_BUS_UART3] =  { 0x2d8, BIT(19) }, 
> > >  [RST_BUS_SCR0] =  { 0x2d8, BIT(20) }, 
> > > + [RST_BUS_SCR1] =  { 0x2d8, BIT(21) }, 
> >
> > That reset line is not valid on the H3. 
> 
> So I should split a H3 reset array and a H5 one?

Ideally, yes.

> (I modelled after ccu-sun5i.c, which shares one reset array)

They all share the same reset lines.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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2017-02-07 15:56 ` [linux-sunxi] Re: [PATCH v3 04/10] clk: sunxi-ng: add support for Allwinner H5 SoC Maxime Ripard

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