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From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	stable@vger.kernel.org, Borislav Petkov <bp@suse.de>,
	David Woodhouse <dwmw@amazon.co.uk>,
	Thomas Gleixner <tglx@linutronix.de>,
	ak@linux.intel.com, dave.hansen@intel.com, karahmed@amazon.de,
	arjan@linux.intel.com, torvalds@linux-foundation.org,
	peterz@infradead.org, bp@alien8.de, pbonzini@redhat.com,
	tim.c.chen@linux.intel.com, gregkh@linux-foundation.org
Subject: [PATCH 4.15 16/60] x86/retpoline: Simplify vmexit_fill_RSB()
Date: Mon,  5 Feb 2018 10:22:49 -0800	[thread overview]
Message-ID: <20180205182214.592329449@linuxfoundation.org> (raw)
In-Reply-To: <20180205182213.902626065@linuxfoundation.org>

4.15-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Borislav Petkov bp@alien8.de

commit 1dde7415e99933bb7293d6b2843752cbdb43ec11

Simplify it to call an asm-function instead of pasting 41 insn bytes at
every call site. Also, add alignment to the macro as suggested here:

  https://support.google.com/faqs/answer/7625886

[dwmw2: Clean up comments, let it clobber %ebx and just tell the compiler]

Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: ak@linux.intel.com
Cc: dave.hansen@intel.com
Cc: karahmed@amazon.de
Cc: arjan@linux.intel.com
Cc: torvalds@linux-foundation.org
Cc: peterz@infradead.org
Cc: bp@alien8.de
Cc: pbonzini@redhat.com
Cc: tim.c.chen@linux.intel.com
Cc: gregkh@linux-foundation.org
Link: https://lkml.kernel.org/r/1517070274-12128-3-git-send-email-dwmw@amazon.co.uk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>


---
 arch/x86/entry/entry_32.S             |    3 -
 arch/x86/entry/entry_64.S             |    3 -
 arch/x86/include/asm/asm-prototypes.h |    3 +
 arch/x86/include/asm/nospec-branch.h  |   70 +++-------------------------------
 arch/x86/lib/Makefile                 |    1 
 arch/x86/lib/retpoline.S              |   56 +++++++++++++++++++++++++++
 6 files changed, 71 insertions(+), 65 deletions(-)

--- a/arch/x86/entry/entry_32.S
+++ b/arch/x86/entry/entry_32.S
@@ -252,7 +252,8 @@ ENTRY(__switch_to_asm)
 	 * exist, overwrite the RSB with entries which capture
 	 * speculative execution to prevent attack.
 	 */
-	FILL_RETURN_BUFFER %ebx, RSB_CLEAR_LOOPS, X86_FEATURE_RSB_CTXSW
+	/* Clobbers %ebx */
+	FILL_RETURN_BUFFER RSB_CLEAR_LOOPS, X86_FEATURE_RSB_CTXSW
 #endif
 
 	/* restore callee-saved registers */
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -499,7 +499,8 @@ ENTRY(__switch_to_asm)
 	 * exist, overwrite the RSB with entries which capture
 	 * speculative execution to prevent attack.
 	 */
-	FILL_RETURN_BUFFER %r12, RSB_CLEAR_LOOPS, X86_FEATURE_RSB_CTXSW
+	/* Clobbers %rbx */
+	FILL_RETURN_BUFFER RSB_CLEAR_LOOPS, X86_FEATURE_RSB_CTXSW
 #endif
 
 	/* restore callee-saved registers */
--- a/arch/x86/include/asm/asm-prototypes.h
+++ b/arch/x86/include/asm/asm-prototypes.h
@@ -38,4 +38,7 @@ INDIRECT_THUNK(dx)
 INDIRECT_THUNK(si)
 INDIRECT_THUNK(di)
 INDIRECT_THUNK(bp)
+asmlinkage void __fill_rsb(void);
+asmlinkage void __clear_rsb(void);
+
 #endif /* CONFIG_RETPOLINE */
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -7,50 +7,6 @@
 #include <asm/alternative-asm.h>
 #include <asm/cpufeatures.h>
 
-/*
- * Fill the CPU return stack buffer.
- *
- * Each entry in the RSB, if used for a speculative 'ret', contains an
- * infinite 'pause; lfence; jmp' loop to capture speculative execution.
- *
- * This is required in various cases for retpoline and IBRS-based
- * mitigations for the Spectre variant 2 vulnerability. Sometimes to
- * eliminate potentially bogus entries from the RSB, and sometimes
- * purely to ensure that it doesn't get empty, which on some CPUs would
- * allow predictions from other (unwanted!) sources to be used.
- *
- * We define a CPP macro such that it can be used from both .S files and
- * inline assembly. It's possible to do a .macro and then include that
- * from C via asm(".include <asm/nospec-branch.h>") but let's not go there.
- */
-
-#define RSB_CLEAR_LOOPS		32	/* To forcibly overwrite all entries */
-#define RSB_FILL_LOOPS		16	/* To avoid underflow */
-
-/*
- * Google experimented with loop-unrolling and this turned out to be
- * the optimal version — two calls, each with their own speculation
- * trap should their return address end up getting used, in a loop.
- */
-#define __FILL_RETURN_BUFFER(reg, nr, sp)	\
-	mov	$(nr/2), reg;			\
-771:						\
-	call	772f;				\
-773:	/* speculation trap */			\
-	pause;					\
-	lfence;					\
-	jmp	773b;				\
-772:						\
-	call	774f;				\
-775:	/* speculation trap */			\
-	pause;					\
-	lfence;					\
-	jmp	775b;				\
-774:						\
-	dec	reg;				\
-	jnz	771b;				\
-	add	$(BITS_PER_LONG/8) * nr, sp;
-
 #ifdef __ASSEMBLY__
 
 /*
@@ -121,17 +77,10 @@
 #endif
 .endm
 
- /*
-  * A simpler FILL_RETURN_BUFFER macro. Don't make people use the CPP
-  * monstrosity above, manually.
-  */
-.macro FILL_RETURN_BUFFER reg:req nr:req ftr:req
+/* This clobbers the BX register */
+.macro FILL_RETURN_BUFFER nr:req ftr:req
 #ifdef CONFIG_RETPOLINE
-	ANNOTATE_NOSPEC_ALTERNATIVE
-	ALTERNATIVE "jmp .Lskip_rsb_\@",				\
-		__stringify(__FILL_RETURN_BUFFER(\reg,\nr,%_ASM_SP))	\
-		\ftr
-.Lskip_rsb_\@:
+	ALTERNATIVE "", "call __clear_rsb", \ftr
 #endif
 .endm
 
@@ -206,15 +155,10 @@ extern char __indirect_thunk_end[];
 static inline void vmexit_fill_RSB(void)
 {
 #ifdef CONFIG_RETPOLINE
-	unsigned long loops;
-
-	asm volatile (ANNOTATE_NOSPEC_ALTERNATIVE
-		      ALTERNATIVE("jmp 910f",
-				  __stringify(__FILL_RETURN_BUFFER(%0, RSB_CLEAR_LOOPS, %1)),
-				  X86_FEATURE_RETPOLINE)
-		      "910:"
-		      : "=r" (loops), ASM_CALL_CONSTRAINT
-		      : : "memory" );
+	alternative_input("",
+			  "call __fill_rsb",
+			  X86_FEATURE_RETPOLINE,
+			  ASM_NO_INPUT_CLOBBER(_ASM_BX, "memory"));
 #endif
 }
 
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -27,6 +27,7 @@ lib-$(CONFIG_RWSEM_XCHGADD_ALGORITHM) +=
 lib-$(CONFIG_INSTRUCTION_DECODER) += insn.o inat.o insn-eval.o
 lib-$(CONFIG_RANDOMIZE_BASE) += kaslr.o
 lib-$(CONFIG_RETPOLINE) += retpoline.o
+OBJECT_FILES_NON_STANDARD_retpoline.o :=y
 
 obj-y += msr.o msr-reg.o msr-reg-export.o hweight.o
 
--- a/arch/x86/lib/retpoline.S
+++ b/arch/x86/lib/retpoline.S
@@ -7,6 +7,7 @@
 #include <asm/alternative-asm.h>
 #include <asm/export.h>
 #include <asm/nospec-branch.h>
+#include <asm/bitsperlong.h>
 
 .macro THUNK reg
 	.section .text.__x86.indirect_thunk
@@ -46,3 +47,58 @@ GENERATE_THUNK(r13)
 GENERATE_THUNK(r14)
 GENERATE_THUNK(r15)
 #endif
+
+/*
+ * Fill the CPU return stack buffer.
+ *
+ * Each entry in the RSB, if used for a speculative 'ret', contains an
+ * infinite 'pause; lfence; jmp' loop to capture speculative execution.
+ *
+ * This is required in various cases for retpoline and IBRS-based
+ * mitigations for the Spectre variant 2 vulnerability. Sometimes to
+ * eliminate potentially bogus entries from the RSB, and sometimes
+ * purely to ensure that it doesn't get empty, which on some CPUs would
+ * allow predictions from other (unwanted!) sources to be used.
+ *
+ * Google experimented with loop-unrolling and this turned out to be
+ * the optimal version - two calls, each with their own speculation
+ * trap should their return address end up getting used, in a loop.
+ */
+.macro STUFF_RSB nr:req sp:req
+	mov	$(\nr / 2), %_ASM_BX
+	.align 16
+771:
+	call	772f
+773:						/* speculation trap */
+	pause
+	lfence
+	jmp	773b
+	.align 16
+772:
+	call	774f
+775:						/* speculation trap */
+	pause
+	lfence
+	jmp	775b
+	.align 16
+774:
+	dec	%_ASM_BX
+	jnz	771b
+	add	$((BITS_PER_LONG/8) * \nr), \sp
+.endm
+
+#define RSB_FILL_LOOPS		16	/* To avoid underflow */
+
+ENTRY(__fill_rsb)
+	STUFF_RSB RSB_FILL_LOOPS, %_ASM_SP
+	ret
+END(__fill_rsb)
+EXPORT_SYMBOL_GPL(__fill_rsb)
+
+#define RSB_CLEAR_LOOPS		32	/* To forcibly overwrite all entries */
+
+ENTRY(__clear_rsb)
+	STUFF_RSB RSB_CLEAR_LOOPS, %_ASM_SP
+	ret
+END(__clear_rsb)
+EXPORT_SYMBOL_GPL(__clear_rsb)

  parent reply	other threads:[~2018-02-05 18:25 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-05 18:22 [PATCH 4.15 00/60] 4.15.2-stable review Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 01/60] KVM: x86: Make indirect calls in emulator speculation safe Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 02/60] KVM: VMX: Make indirect call " Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 03/60] module/retpoline: Warn about missing retpoline in module Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 04/60] x86/cpufeatures: Add CPUID_7_EDX CPUID leaf Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 05/60] x86/cpufeatures: Add Intel feature bits for Speculation Control Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 06/60] x86/cpufeatures: Add AMD " Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 07/60] x86/msr: Add definitions for new speculation control MSRs Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 08/60] x86/pti: Do not enable PTI on CPUs which are not vulnerable to Meltdown Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 09/60] x86/cpufeature: Blacklist SPEC_CTRL/PRED_CMD on early Spectre v2 microcodes Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 10/60] x86/speculation: Add basic IBPB (Indirect Branch Prediction Barrier) support Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 11/60] x86/alternative: Print unadorned pointers Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 12/60] x86/nospec: Fix header guards names Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 13/60] x86/bugs: Drop one "mitigation" from dmesg Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 14/60] x86/cpu/bugs: Make retpoline module warning conditional Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 15/60] x86/cpufeatures: Clean up Spectre v2 related CPUID flags Greg Kroah-Hartman
2018-02-05 18:22 ` Greg Kroah-Hartman [this message]
2018-02-05 18:22 ` [PATCH 4.15 17/60] x86/speculation: Simplify indirect_branch_prediction_barrier() Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 18/60] auxdisplay: img-ascii-lcd: add missing MODULE_DESCRIPTION/AUTHOR/LICENSE Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 19/60] iio: adc/accel: Fix up module licenses Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 20/60] pinctrl: pxa: pxa2xx: add missing MODULE_DESCRIPTION/AUTHOR/LICENSE Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 21/60] ASoC: pcm512x: " Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 22/60] KVM: nVMX: Eliminate vmcs02 pool Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 23/60] KVM: VMX: introduce alloc_loaded_vmcs Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 24/60] objtool: Improve retpoline alternative handling Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 25/60] objtool: Add support for alternatives at the end of a section Greg Kroah-Hartman
2018-02-05 18:22 ` [PATCH 4.15 26/60] objtool: Warn on stripped section symbol Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 27/60] x86/mm: Fix overlap of i386 CPU_ENTRY_AREA with FIX_BTMAP Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 28/60] x86/spectre: Check CONFIG_RETPOLINE in command line parser Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 29/60] x86/entry/64: Remove the SYSCALL64 fast path Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 30/60] x86/entry/64: Push extra regs right away Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 31/60] x86/asm: Move status from thread_struct to thread_info Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 32/60] Documentation: Document array_index_nospec Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 33/60] array_index_nospec: Sanitize speculative array de-references Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 34/60] x86: Implement array_index_mask_nospec Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 35/60] x86: Introduce barrier_nospec Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 36/60] x86: Introduce __uaccess_begin_nospec() and uaccess_try_nospec Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 37/60] x86/usercopy: Replace open coded stac/clac with __uaccess_{begin, end} Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 38/60] x86/uaccess: Use __uaccess_begin_nospec() and uaccess_try_nospec Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 39/60] x86/get_user: Use pointer masking to limit speculation Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 40/60] x86/syscall: Sanitize syscall table de-references under speculation Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 41/60] vfs, fdtable: Prevent bounds-check bypass via speculative execution Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 42/60] nl80211: Sanitize array index in parse_txq_params Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 43/60] x86/spectre: Report get_user mitigation for spectre_v1 Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 44/60] x86/spectre: Fix spelling mistake: "vunerable"-> "vulnerable" Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 45/60] x86/cpuid: Fix up "virtual" IBRS/IBPB/STIBP feature bits on Intel Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 46/60] x86/speculation: Use Indirect Branch Prediction Barrier in context switch Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 47/60] x86/paravirt: Remove noreplace-paravirt cmdline option Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 48/60] KVM: VMX: make MSR bitmaps per-VCPU Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 49/60] x86/kvm: Update spectre-v1 mitigation Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 50/60] x86/retpoline: Avoid retpolines for built-in __init functions Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 51/60] x86/spectre: Simplify spectre_v2 command line parsing Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 52/60] x86/pti: Mark constant arrays as __initconst Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 53/60] x86/speculation: Fix typo IBRS_ATT, which should be IBRS_ALL Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 54/60] KVM/x86: Update the reverse_cpuid list to include CPUID_7_EDX Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 55/60] KVM/x86: Add IBPB support Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 56/60] KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 57/60] KVM/VMX: Allow direct access to MSR_IA32_SPEC_CTRL Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 58/60] KVM/SVM: " Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 59/60] serial: core: mark port as initialized after successful IRQ change Greg Kroah-Hartman
2018-02-05 18:23 ` [PATCH 4.15 60/60] fpga: region: release of_parse_phandle nodes after use Greg Kroah-Hartman
2018-02-05 22:14 ` [PATCH 4.15 00/60] 4.15.2-stable review Shuah Khan
2018-02-06 10:33   ` Greg Kroah-Hartman
2018-02-05 23:58 ` Dan Rue
2018-02-06 10:33   ` Greg Kroah-Hartman
2018-02-06  0:36 ` kernelci.org bot
2018-02-06 14:30 ` Guenter Roeck
2018-02-06 14:32 ` Guenter Roeck
2018-02-06 17:00   ` Greg Kroah-Hartman

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