From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: LKML <linux-kernel@vger.kernel.org>,
x86@kernel.org, Andy Lutomirski <luto@kernel.org>,
Josh Poimboeuf <jpoimboe@redhat.com>
Subject: Re: [patch 04/14] x86/exceptions: Make IST index zero based
Date: Tue, 2 Apr 2019 09:49:00 -0700 [thread overview]
Message-ID: <20190402164900.GC29004@linux.intel.com> (raw)
In-Reply-To: <20190331215135.133741719@linutronix.de>
On Sun, Mar 31, 2019 at 11:40:24PM +0200, Thomas Gleixner wrote:
> The defines for the exception stack (IST) array in the TSS are using the
> SDM convention IST1 - IST7. That causes all sorts of code to subtract 1 for
> array indices related to IST. That's confusing at best and does not provide
> any value.
>
> Make the indices zero based and fixup the usage sites. The only code which
> needs to adjust the 0 based index is the interrupt descriptor setup which
> needs to add 1 now.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
> Documentation/x86/kernel-stacks | 8 ++++----
> arch/x86/entry/entry_64.S | 4 ++--
> arch/x86/include/asm/page_64_types.h | 13 ++++++++-----
> arch/x86/kernel/cpu/common.c | 4 ++--
> arch/x86/kernel/dumpstack_64.c | 14 +++++++-------
> arch/x86/kernel/idt.c | 15 +++++++++------
> 6 files changed, 32 insertions(+), 26 deletions(-)
>
> --- a/Documentation/x86/kernel-stacks
> +++ b/Documentation/x86/kernel-stacks
> @@ -59,7 +59,7 @@ If that assumption is ever broken then t
>
> The currently assigned IST stacks are :-
>
> -* DOUBLEFAULT_STACK. EXCEPTION_STKSZ (PAGE_SIZE).
> +* DOUBLEFAULT_IST. EXCEPTION_STKSZ (PAGE_SIZE).
>
> Used for interrupt 8 - Double Fault Exception (#DF).
>
> @@ -68,7 +68,7 @@ The currently assigned IST stacks are :-
> Using a separate stack allows the kernel to recover from it well enough
> in many cases to still output an oops.
>
> -* NMI_STACK. EXCEPTION_STKSZ (PAGE_SIZE).
> +* NMI_IST. EXCEPTION_STKSZ (PAGE_SIZE).
>
> Used for non-maskable interrupts (NMI).
>
> @@ -76,7 +76,7 @@ The currently assigned IST stacks are :-
> middle of switching stacks. Using IST for NMI events avoids making
> assumptions about the previous state of the kernel stack.
>
> -* DEBUG_STACK. DEBUG_STKSZ
> +* DEBUG_IST. DEBUG_STKSZ
What about <name>_STACK_IST, or is that too verbose? It'd be nice to have
the extra mental cue that IST is referring the 64 exception stacks.
>
> Used for hardware debug interrupts (interrupt 1) and for software
> debug interrupts (INT3).
> @@ -86,7 +86,7 @@ The currently assigned IST stacks are :-
> avoids making assumptions about the previous state of the kernel
> stack.
>
> -* MCE_STACK. EXCEPTION_STKSZ (PAGE_SIZE).
> +* MCE_IST. EXCEPTION_STKSZ (PAGE_SIZE).
>
> Used for interrupt 18 - Machine Check Exception (#MC).
>
next prev parent reply other threads:[~2019-04-02 16:49 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-31 21:40 [patch 00/14] x86/exceptions: Add guard patches to IST stacks Thomas Gleixner
2019-03-31 21:40 ` [patch 01/14] x86/irq/64: Limit IST stack overflow check to #DB stack Thomas Gleixner
2019-04-01 18:03 ` Borislav Petkov
2019-04-02 16:34 ` Sean Christopherson
2019-03-31 21:40 ` [patch 02/14] x86/idt: Remove unused macro SISTG Thomas Gleixner
2019-04-01 4:04 ` Andy Lutomirski
2019-03-31 21:40 ` [patch 03/14] x86/exceptions: Remove unused stack defines on 32bit Thomas Gleixner
2019-03-31 21:40 ` [patch 04/14] x86/exceptions: Make IST index zero based Thomas Gleixner
2019-04-01 7:30 ` Peter Zijlstra
2019-04-01 7:33 ` Thomas Gleixner
2019-04-02 16:49 ` Sean Christopherson [this message]
2019-04-03 16:35 ` Borislav Petkov
2019-03-31 21:40 ` [patch 05/14] x86/cpu_entry_area: Cleanup setup functions Thomas Gleixner
2019-03-31 21:40 ` [patch 06/14] x86/exceptions: Add structs for exception stacks Thomas Gleixner
2019-03-31 21:40 ` [patch 07/14] x86/cpu_entry_area: Prepare for IST guard pages Thomas Gleixner
2019-03-31 21:40 ` [patch 08/14] x86/cpu_entry_area: Provide exception stack accessor Thomas Gleixner
2019-03-31 21:40 ` [patch 09/14] x86/traps: Use cpu_entry_area instead of orig_ist Thomas Gleixner
2019-03-31 21:40 ` [patch 10/14] x86/irq/64: Use cpu entry area " Thomas Gleixner
2019-03-31 21:40 ` [patch 11/14] x86/dumpstack/64: Use cpu_entry_area " Thomas Gleixner
2019-03-31 21:40 ` [patch 12/14] x86/cpu: Prepare TSS.IST setup for guard pages Thomas Gleixner
2019-04-02 16:57 ` Sean Christopherson
2019-03-31 21:40 ` [patch 13/14] x86/cpu: Remove orig_ist array Thomas Gleixner
2019-03-31 21:40 ` [patch 14/14] x86/exceptions: Enable IST guard pages Thomas Gleixner
2019-04-02 10:19 ` [patch 15/14] x86/dumpstack/64: Speedup in_exception_stack() Thomas Gleixner
2019-04-02 15:43 ` Josh Poimboeuf
2019-04-02 15:48 ` Thomas Gleixner
2019-04-02 15:51 ` Josh Poimboeuf
2019-04-02 15:53 ` Josh Poimboeuf
2019-04-03 8:08 ` Peter Zijlstra
2019-04-03 8:10 ` Peter Zijlstra
2019-04-03 15:11 ` Josh Poimboeuf
2019-04-02 16:11 ` Andy Lutomirski
2019-04-02 18:27 ` Thomas Gleixner
2019-04-02 19:29 ` Thomas Gleixner
2019-04-03 0:36 ` Andy Lutomirski
2019-04-03 16:26 ` Thomas Gleixner
2019-04-03 19:42 ` Thomas Gleixner
2019-04-04 0:03 ` Andy Lutomirski
2019-04-02 19:02 ` Rasmus Villemoes
2019-04-02 19:21 ` Thomas Gleixner
2019-04-03 8:02 ` Peter Zijlstra
2019-04-01 4:03 ` [patch 00/14] x86/exceptions: Add guard patches to IST stacks Andy Lutomirski
2019-04-03 16:30 ` Thomas Gleixner
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