mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: tglx@linutronix.de
Cc: linux-kernel@vger.kernel.org, Dmitry Osipenko <digetx@gmail.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	linux-tegra@vger.kernel.org (open list:TEGRA ARCHITECTURE
	SUPPORT)
Subject: [PATCH 10/25] clocksource/drivers/tegra: Minor code clean up
Date: Wed, 26 Jun 2019 16:46:36 +0200	[thread overview]
Message-ID: <20190626144651.16742-10-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <20190626144651.16742-1-daniel.lezcano@linaro.org>

From: Dmitry Osipenko <digetx@gmail.com>

Correct typo and use proper upper casing for acronyms in the comments,
use common style for error messages, prepend error messages with
"tegra-timer:", add error message for cpuhp_setup_state() failure and
clean up whitespaces in the code to fix checkpatch warnings.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/timer-tegra20.c | 43 ++++++++++++++++-------------
 1 file changed, 24 insertions(+), 19 deletions(-)

diff --git a/drivers/clocksource/timer-tegra20.c b/drivers/clocksource/timer-tegra20.c
index e2ef6b8211a5..6a3704142f31 100644
--- a/drivers/clocksource/timer-tegra20.c
+++ b/drivers/clocksource/timer-tegra20.c
@@ -6,6 +6,8 @@
  *	Colin Cross <ccross@google.com>
  */
 
+#define pr_fmt(fmt)	"tegra-timer: " fmt
+
 #include <linux/clk.h>
 #include <linux/clockchips.h>
 #include <linux/cpu.h>
@@ -21,13 +23,13 @@
 
 #include "timer-of.h"
 
-#define RTC_SECONDS            0x08
-#define RTC_SHADOW_SECONDS     0x0c
-#define RTC_MILLISECONDS       0x10
+#define RTC_SECONDS		0x08
+#define RTC_SHADOW_SECONDS	0x0c
+#define RTC_MILLISECONDS	0x10
 
-#define TIMERUS_CNTR_1US 0x10
-#define TIMERUS_USEC_CFG 0x14
-#define TIMERUS_CNTR_FREEZE 0x4c
+#define TIMERUS_CNTR_1US	0x10
+#define TIMERUS_USEC_CFG	0x14
+#define TIMERUS_CNTR_FREEZE	0x4c
 
 #define TIMER_PTV		0x0
 #define TIMER_PTV_EN		BIT(31)
@@ -48,7 +50,7 @@ static u32 usec_config;
 static void __iomem *timer_reg_base;
 
 static int tegra_timer_set_next_event(unsigned long cycles,
-					 struct clock_event_device *evt)
+				      struct clock_event_device *evt)
 {
 	void __iomem *reg_base = timer_of_base(to_timer_of(evt));
 
@@ -169,15 +171,17 @@ static struct timer_of suspend_rtc_to = {
 
 /*
  * tegra_rtc_read - Reads the Tegra RTC registers
- * Care must be taken that this funciton is not called while the
+ * Care must be taken that this function is not called while the
  * tegra_rtc driver could be executing to avoid race conditions
  * on the RTC shadow register
  */
 static u64 tegra_rtc_read_ms(struct clocksource *cs)
 {
 	void __iomem *reg_base = timer_of_base(&suspend_rtc_to);
+
 	u32 ms = readl_relaxed(reg_base + RTC_MILLISECONDS);
 	u32 s = readl_relaxed(reg_base + RTC_SHADOW_SECONDS);
+
 	return (u64)s * MSEC_PER_SEC + ms;
 }
 
@@ -222,7 +226,7 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20)
 
 	to = this_cpu_ptr(&tegra_to);
 	ret = timer_of_init(np, to);
-	if (ret < 0)
+	if (ret)
 		goto out;
 
 	timer_reg_base = timer_of_base(to);
@@ -281,8 +285,7 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20)
 		cpu_to->clkevt.cpumask = cpumask_of(cpu);
 		cpu_to->clkevt.irq = irq_of_parse_and_map(np, idx);
 		if (!cpu_to->clkevt.irq) {
-			pr_err("%s: can't map IRQ for CPU%d\n",
-			       __func__, cpu);
+			pr_err("failed to map irq for cpu%d\n", cpu);
 			ret = -EINVAL;
 			goto out_irq;
 		}
@@ -292,8 +295,8 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20)
 				  IRQF_TIMER | IRQF_NOBALANCING,
 				  cpu_to->clkevt.name, &cpu_to->clkevt);
 		if (ret) {
-			pr_err("%s: cannot setup irq %d for CPU%d\n",
-				__func__, cpu_to->clkevt.irq, cpu);
+			pr_err("failed to set up irq for cpu%d: %d\n",
+			       cpu, ret);
 			irq_dispose_mapping(cpu_to->clkevt.irq);
 			cpu_to->clkevt.irq = 0;
 			goto out_irq;
@@ -312,11 +315,14 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20)
 	register_current_timer_delay(&tegra_delay_timer);
 #endif
 
-	cpuhp_setup_state(CPUHP_AP_TEGRA_TIMER_STARTING,
-			  "AP_TEGRA_TIMER_STARTING", tegra_timer_setup,
-			  tegra_timer_stop);
+	ret = cpuhp_setup_state(CPUHP_AP_TEGRA_TIMER_STARTING,
+				"AP_TEGRA_TIMER_STARTING", tegra_timer_setup,
+				tegra_timer_stop);
+	if (ret)
+		pr_err("failed to set up cpu hp state: %d\n", ret);
 
 	return ret;
+
 out_irq:
 	for_each_possible_cpu(cpu) {
 		struct timer_of *cpu_to;
@@ -329,6 +335,7 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20)
 	}
 out:
 	timer_of_cleanup(to);
+
 	return ret;
 }
 
@@ -352,8 +359,6 @@ static int __init tegra20_init_rtc(struct device_node *np)
 	if (ret)
 		return ret;
 
-	clocksource_register_hz(&suspend_rtc_clocksource, 1000);
-
-	return 0;
+	return clocksource_register_hz(&suspend_rtc_clocksource, 1000);
 }
 TIMER_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc);
-- 
2.17.1


  parent reply	other threads:[~2019-06-26 14:48 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-26 14:43 [GIT PULL] timer drivers for v5.4 Daniel Lezcano
2019-06-26 14:46 ` [PATCH 01/25] clocksource/drivers/timer-meson6: Update with SPDX Licence identifier Daniel Lezcano
2019-06-26 14:46   ` [PATCH 02/25] clocksource/drivers/ixp4xx: Implement delay timer Daniel Lezcano
2019-06-26 14:46   ` [PATCH 03/25] clocksource/drivers/arc_timer: Use BIT() instead of _BITUL() Daniel Lezcano
2019-06-26 14:46   ` [PATCH 04/25] clocksource/drivers/exynos_mct: Increase priority over ARM arch timer Daniel Lezcano
2019-06-26 14:46   ` [PATCH 05/25] clocksource/drivers/tegra: Support per-CPU timers on all Tegra's Daniel Lezcano
2019-06-26 14:46   ` [PATCH 06/25] clocksource/drivers/tegra: Unify timer code Daniel Lezcano
2019-06-26 14:46   ` [PATCH 07/25] clocksource/drivers/tegra: Reset hardware state on init Daniel Lezcano
2019-06-26 14:46   ` [PATCH 08/25] clocksource/drivers/tegra: Replace readl/writel with relaxed versions Daniel Lezcano
2019-06-26 14:46   ` [PATCH 09/25] clocksource/drivers/tegra: Release all IRQ's on request_irq() error Daniel Lezcano
2019-06-26 14:46   ` Daniel Lezcano [this message]
2019-06-26 14:46   ` [PATCH 11/25] clocksource/drivers/tegra: Support COMPILE_TEST universally Daniel Lezcano
2019-06-26 14:46   ` [PATCH 12/25] clocksource/drivers/tegra: Lower clocksource rating for some Tegra's Daniel Lezcano
2019-06-26 14:46   ` [PATCH 13/25] clocksource/drivers/tegra: Rename timer-tegra20.c to timer-tegra.c Daniel Lezcano
2019-06-26 14:46   ` [PATCH 14/25] clocksource/drivers/sysctr: Add nxp system counter timer driver support Daniel Lezcano
2019-06-26 14:46   ` [PATCH 15/25] clocksource/drivers/arm_arch_timer: Extract elf_hwcap use to arch-helper Daniel Lezcano
2019-06-26 14:46   ` [PATCH 16/25] clocksource/drivers/tegra: Restore timer rate on Tegra210 Daniel Lezcano
2019-06-26 14:46   ` [PATCH 17/25] clocksource/drivers/tegra: Remove duplicated use of per_cpu_ptr Daniel Lezcano
2019-06-26 14:46   ` [PATCH 18/25] clocksource/drivers/tegra: Set and use timer's period Daniel Lezcano
2019-06-26 14:46   ` [PATCH 19/25] clocksource/drivers/tegra: Drop unneeded typecasting in one place Daniel Lezcano
2019-06-26 14:46   ` [PATCH 20/25] clocksource/drivers/tegra: Add verbose definition for 1MHz constant Daniel Lezcano
2019-06-26 14:46   ` [PATCH 21/25] clocksource/drivers/tegra: Restore base address before cleanup Daniel Lezcano
2019-06-26 14:46   ` [PATCH 22/25] clocksource/drivers/tegra: Cycles can't be 0 Daniel Lezcano
2019-06-26 14:46   ` [PATCH 23/25] clocksource/drivers/tegra: Set up maximum-ticks limit properly Daniel Lezcano
2019-06-26 14:46   ` [PATCH 24/25] clocksource/drivers/davinci: Add support for clockevents Daniel Lezcano
2019-06-26 14:46   ` [PATCH 25/25] clocksource/drivers/davinci: Add support for clocksource Daniel Lezcano

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190626144651.16742-10-daniel.lezcano@linaro.org \
    --to=daniel.lezcano@linaro.org \
    --cc=digetx@gmail.com \
    --cc=jonathanh@nvidia.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=tglx@linutronix.de \
    --cc=thierry.reding@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®