From: Wei Huang <wei.huang2@amd.com>
To: kvm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, pbonzini@redhat.com,
vkuznets@redhat.com, mlevitsk@redhat.com, seanjc@google.com,
joro@8bytes.org, bp@alien8.de, tglx@linutronix.de,
mingo@redhat.com, x86@kernel.org, jmattson@google.com,
wanpengli@tencent.com, bsd@redhat.com, dgilbert@redhat.com,
luto@amacapital.net, wei.huang2@amd.com
Subject: [PATCH v3 4/4] KVM: SVM: Support #GP handling for the case of nested on nested
Date: Tue, 26 Jan 2021 03:18:31 -0500 [thread overview]
Message-ID: <20210126081831.570253-5-wei.huang2@amd.com> (raw)
In-Reply-To: <20210126081831.570253-1-wei.huang2@amd.com>
Under the case of nested on nested (L0->L1->L2->L3), #GP triggered by
SVM instructions can be hided from L1. Instead the hypervisor can
inject the proper #VMEXIT to inform L1 of what is happening. Thus L1
can avoid invoking the #GP workaround. For this reason we turns on
guest VM's X86_FEATURE_SVME_ADDR_CHK bit for KVM running inside VM to
receive the notification and change behavior.
Similarly we check if vcpu is under guest mode before emulating the
vmware-backdoor instructions. For the case of nested on nested, we
let the guest handle it.
Co-developed-by: Bandan Das <bsd@redhat.com>
Signed-off-by: Bandan Das <bsd@redhat.com>
Signed-off-by: Wei Huang <wei.huang2@amd.com>
Tested-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
---
arch/x86/kvm/svm/svm.c | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index f9233c79265b..83c401d2709f 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -929,6 +929,9 @@ static __init void svm_set_cpu_caps(void)
if (npt_enabled)
kvm_cpu_cap_set(X86_FEATURE_NPT);
+
+ /* Nested VM can receive #VMEXIT instead of triggering #GP */
+ kvm_cpu_cap_set(X86_FEATURE_SVME_ADDR_CHK);
}
/* CPUID 0x80000008 */
@@ -2198,6 +2201,11 @@ static int svm_instr_opcode(struct kvm_vcpu *vcpu)
static int emulate_svm_instr(struct kvm_vcpu *vcpu, int opcode)
{
+ const int guest_mode_exit_codes[] = {
+ [SVM_INSTR_VMRUN] = SVM_EXIT_VMRUN,
+ [SVM_INSTR_VMLOAD] = SVM_EXIT_VMLOAD,
+ [SVM_INSTR_VMSAVE] = SVM_EXIT_VMSAVE,
+ };
int (*const svm_instr_handlers[])(struct vcpu_svm *svm) = {
[SVM_INSTR_VMRUN] = vmrun_interception,
[SVM_INSTR_VMLOAD] = vmload_interception,
@@ -2205,7 +2213,14 @@ static int emulate_svm_instr(struct kvm_vcpu *vcpu, int opcode)
};
struct vcpu_svm *svm = to_svm(vcpu);
- return svm_instr_handlers[opcode](svm);
+ if (is_guest_mode(vcpu)) {
+ svm->vmcb->control.exit_code = guest_mode_exit_codes[opcode];
+ svm->vmcb->control.exit_info_1 = 0;
+ svm->vmcb->control.exit_info_2 = 0;
+
+ return nested_svm_vmexit(svm);
+ } else
+ return svm_instr_handlers[opcode](svm);
}
/*
@@ -2239,7 +2254,8 @@ static int gp_interception(struct vcpu_svm *svm)
* VMware backdoor emulation on #GP interception only handles
* IN{S}, OUT{S}, and RDPMC.
*/
- return kvm_emulate_instruction(vcpu,
+ if (!is_guest_mode(vcpu))
+ return kvm_emulate_instruction(vcpu,
EMULTYPE_VMWARE_GP | EMULTYPE_NO_DECODE);
} else
return emulate_svm_instr(vcpu, opcode);
--
2.27.0
next prev parent reply other threads:[~2021-01-26 11:18 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-26 8:18 [PATCH v3 0/4] Handle #GP for SVM execution instructions Wei Huang
2021-01-26 8:18 ` [PATCH v3 1/4] KVM: x86: Factor out x86 instruction emulation with decoding Wei Huang
2021-01-26 8:18 ` [PATCH v3 2/4] KVM: SVM: Add emulation support for #GP triggered by SVM instructions Wei Huang
2021-01-26 11:34 ` Paolo Bonzini
2021-01-26 11:50 ` Maxim Levitsky
2021-01-26 8:18 ` [PATCH v3 3/4] KVM: SVM: Add support for SVM instruction address check change Wei Huang
2021-01-26 11:52 ` Maxim Levitsky
2021-01-26 15:39 ` Wei Huang
2021-01-26 8:18 ` Wei Huang [this message]
2021-01-26 11:39 ` [PATCH v3 4/4] KVM: SVM: Support #GP handling for the case of nested on nested Paolo Bonzini
2021-01-26 11:59 ` Maxim Levitsky
2021-01-26 11:39 ` [PATCH v3 0/4] Handle #GP for SVM execution instructions Paolo Bonzini
2021-01-26 15:05 ` Wei Huang
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