From: Arnaldo Carvalho de Melo <acme@kernel.org>
To: kan.liang@linux.intel.com
Cc: peterz@infradead.org, mingo@kernel.org,
linux-kernel@vger.kernel.org, tglx@linutronix.de, bp@alien8.de,
namhyung@kernel.org, jolsa@redhat.com, ak@linux.intel.com,
yao.jin@linux.intel.com, alexander.shishkin@linux.intel.com,
adrian.hunter@intel.com
Subject: Re: [PATCH 35/49] perf parse-events: Create two hybrid hardware events
Date: Mon, 8 Feb 2021 15:59:05 -0300 [thread overview]
Message-ID: <20210208185905.GL920417@kernel.org> (raw)
In-Reply-To: <1612797946-18784-36-git-send-email-kan.liang@linux.intel.com>
Em Mon, Feb 08, 2021 at 07:25:32AM -0800, kan.liang@linux.intel.com escreveu:
> From: Jin Yao <yao.jin@linux.intel.com>
>
> For hardware events, they have pre-defined configs. The kernel
> needs to know where the event comes from (e.g. from cpu_core pmu
> or from cpu_atom pmu). But the perf type 'PERF_TYPE_HARDWARE'
> can't carry pmu information.
>
> So the kernel introduces a new type 'PERF_TYPE_HARDWARE_PMU'.
> The new attr.config layout for PERF_TYPE_HARDWARE_PMU is:
>
> 0xDD000000AA
> AA: original hardware event ID
> DD: PMU type ID
>
> PMU type ID is retrieved from sysfs. For example,
>
> cat /sys/devices/cpu_atom/type
> 10
>
> cat /sys/devices/cpu_core/type
> 4
>
> When enabling a hybrid hardware event without specified pmu, such as,
> 'perf stat -e cycles -a', two events are created automatically. One
> is for atom, the other is for core.
please move the command output two chars to the right, otherwise lines
with --- may confuse some scripts.
> root@otcpl-adl-s-2:~# ./perf stat -e cycles -vv -a -- sleep 1
> Control descriptor is not initialized
> ------------------------------------------------------------
> perf_event_attr:
> type 6
> size 120
> config 0x400000000
> sample_type IDENTIFIER
> read_format TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING
> disabled 1
> inherit 1
> exclude_guest 1
> ------------------------------------------------------------
> sys_perf_event_open: pid -1 cpu 0 group_fd -1 flags 0x8 = 3
> sys_perf_event_open: pid -1 cpu 1 group_fd -1 flags 0x8 = 4
> sys_perf_event_open: pid -1 cpu 2 group_fd -1 flags 0x8 = 5
> sys_perf_event_open: pid -1 cpu 3 group_fd -1 flags 0x8 = 7
> sys_perf_event_open: pid -1 cpu 4 group_fd -1 flags 0x8 = 8
> sys_perf_event_open: pid -1 cpu 5 group_fd -1 flags 0x8 = 9
> sys_perf_event_open: pid -1 cpu 6 group_fd -1 flags 0x8 = 10
> sys_perf_event_open: pid -1 cpu 7 group_fd -1 flags 0x8 = 11
> sys_perf_event_open: pid -1 cpu 8 group_fd -1 flags 0x8 = 12
> sys_perf_event_open: pid -1 cpu 9 group_fd -1 flags 0x8 = 13
> sys_perf_event_open: pid -1 cpu 10 group_fd -1 flags 0x8 = 14
> sys_perf_event_open: pid -1 cpu 11 group_fd -1 flags 0x8 = 15
> sys_perf_event_open: pid -1 cpu 12 group_fd -1 flags 0x8 = 16
> sys_perf_event_open: pid -1 cpu 13 group_fd -1 flags 0x8 = 17
> sys_perf_event_open: pid -1 cpu 14 group_fd -1 flags 0x8 = 18
> sys_perf_event_open: pid -1 cpu 15 group_fd -1 flags 0x8 = 19
> ------------------------------------------------------------
> perf_event_attr:
> type 6
> size 120
> config 0xa00000000
> sample_type IDENTIFIER
> read_format TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING
> disabled 1
> inherit 1
> exclude_guest 1
> ------------------------------------------------------------
> sys_perf_event_open: pid -1 cpu 16 group_fd -1 flags 0x8 = 20
> sys_perf_event_open: pid -1 cpu 17 group_fd -1 flags 0x8 = 21
> sys_perf_event_open: pid -1 cpu 18 group_fd -1 flags 0x8 = 22
> sys_perf_event_open: pid -1 cpu 19 group_fd -1 flags 0x8 = 23
> sys_perf_event_open: pid -1 cpu 20 group_fd -1 flags 0x8 = 24
> sys_perf_event_open: pid -1 cpu 21 group_fd -1 flags 0x8 = 25
> sys_perf_event_open: pid -1 cpu 22 group_fd -1 flags 0x8 = 26
> sys_perf_event_open: pid -1 cpu 23 group_fd -1 flags 0x8 = 27
> cycles: 0: 1254337 1001292571 1001292571
> cycles: 1: 2595141 1001279813 1001279813
> cycles: 2: 134853 1001276406 1001276406
> cycles: 3: 81119 1001271089 1001271089
> cycles: 4: 251353 1001264678 1001264678
> cycles: 5: 415593 1001259163 1001259163
> cycles: 6: 129643 1001265312 1001265312
> cycles: 7: 80289 1001258979 1001258979
> cycles: 8: 169983 1001251207 1001251207
> cycles: 9: 81981 1001245487 1001245487
> cycles: 10: 4116221 1001245537 1001245537
> cycles: 11: 85531 1001253097 1001253097
> cycles: 12: 3969132 1001254270 1001254270
> cycles: 13: 96006 1001254691 1001254691
> cycles: 14: 385004 1001244971 1001244971
> cycles: 15: 394446 1001251437 1001251437
> cycles: 0: 427330 1001253457 1001253457
> cycles: 1: 444043 1001255914 1001255914
> cycles: 2: 97285 1001253555 1001253555
> cycles: 3: 92071 1001260556 1001260556
> cycles: 4: 86292 1001249896 1001249896
> cycles: 5: 236851 1001238979 1001238979
> cycles: 6: 100081 1001239792 1001239792
> cycles: 7: 72836 1001243276 1001243276
> cycles: 14240632 16020168708 16020168708
> cycles: 1556789 8009995425 8009995425
>
> Performance counter stats for 'system wide':
>
> 14,240,632 cycles
> 1,556,789 cycles
>
> 1.002261231 seconds time elapsed
>
> type 6 is PERF_TYPE_HARDWARE_PMU.
> 0x4 in 0x400000000 indicates the cpu_core pmu.
> 0xa in 0xa00000000 indicates the cpu_atom pmu.
>
> Reviewed-by: Andi Kleen <ak@linux.intel.com>
> Signed-off-by: Jin Yao <yao.jin@linux.intel.com>
> ---
> tools/perf/util/parse-events.c | 73 ++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 73 insertions(+)
>
> diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c
> index 81a6fce..1e767dc 100644
> --- a/tools/perf/util/parse-events.c
> +++ b/tools/perf/util/parse-events.c
> @@ -446,6 +446,24 @@ static int config_attr(struct perf_event_attr *attr,
> struct parse_events_error *err,
> config_term_func_t config_term);
>
> +static void config_hybrid_attr(struct perf_event_attr *attr,
> + int type, int pmu_type)
> +{
> + /*
> + * attr.config layout:
> + * PERF_TYPE_HARDWARE_PMU: 0xDD000000AA
> + * AA: hardware event ID
> + * DD: PMU type ID
> + * PERF_TYPE_HW_CACHE_PMU: 0xDD00CCBBAA
> + * AA: hardware cache ID
> + * BB: hardware cache op ID
> + * CC: hardware cache op result ID
> + * DD: PMU type ID
> + */
> + attr->type = type;
> + attr->config = attr->config | ((__u64)pmu_type << PERF_PMU_TYPE_SHIFT);
> +}
> +
> int parse_events_add_cache(struct list_head *list, int *idx,
> char *type, char *op_result1, char *op_result2,
> struct parse_events_error *err,
> @@ -1409,6 +1427,47 @@ int parse_events_add_tracepoint(struct list_head *list, int *idx,
> err, head_config);
> }
>
> +static int create_hybrid_hw_event(struct parse_events_state *parse_state,
> + struct list_head *list,
> + struct perf_event_attr *attr,
> + struct perf_pmu *pmu)
> +{
> + struct evsel *evsel;
> + __u32 type = attr->type;
> + __u64 config = attr->config;
> +
> + config_hybrid_attr(attr, PERF_TYPE_HARDWARE_PMU, pmu->type);
> + evsel = __add_event(list, &parse_state->idx, attr, true, NULL,
> + pmu, NULL, false, NULL);
> + if (evsel)
> + evsel->pmu_name = strdup(pmu->name);
> + else
> + return -ENOMEM;
> +
> + attr->type = type;
> + attr->config = config;
> + return 0;
> +}
> +
> +static int add_hybrid_numeric(struct parse_events_state *parse_state,
> + struct list_head *list,
> + struct perf_event_attr *attr,
> + bool *hybrid)
> +{
> + struct perf_pmu *pmu;
> + int ret;
> +
> + *hybrid = false;
> + perf_pmu__for_each_hybrid_pmus(pmu) {
> + *hybrid = true;
> + ret = create_hybrid_hw_event(parse_state, list, attr, pmu);
> + if (ret)
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> int parse_events_add_numeric(struct parse_events_state *parse_state,
> struct list_head *list,
> u32 type, u64 config,
> @@ -1416,6 +1475,8 @@ int parse_events_add_numeric(struct parse_events_state *parse_state,
> {
> struct perf_event_attr attr;
> LIST_HEAD(config_terms);
> + bool hybrid;
> + int ret;
>
> memset(&attr, 0, sizeof(attr));
> attr.type = type;
> @@ -1430,6 +1491,18 @@ int parse_events_add_numeric(struct parse_events_state *parse_state,
> return -ENOMEM;
> }
>
> + /*
> + * Skip the software dummy event.
> + */
> + if (type != PERF_TYPE_SOFTWARE) {
> + if (!perf_pmu__hybrid_exist())
> + perf_pmu__scan(NULL);
> +
> + ret = add_hybrid_numeric(parse_state, list, &attr, &hybrid);
> + if (hybrid)
> + return ret;
> + }
> +
> return add_event(list, &parse_state->idx, &attr,
> get_config_name(head_config), &config_terms);
> }
> --
> 2.7.4
>
--
- Arnaldo
next prev parent reply other threads:[~2021-02-08 20:24 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-08 15:24 [PATCH 00/49] Add Alder Lake support for perf kan.liang
2021-02-08 15:24 ` [PATCH 01/49] x86/cpufeatures: Enumerate Intel Hybrid Technology feature bit kan.liang
2021-02-08 15:24 ` [PATCH 02/49] x86/cpu: Describe hybrid CPUs in cpuinfo_x86 kan.liang
2021-02-08 17:56 ` Borislav Petkov
2021-02-08 19:04 ` Liang, Kan
2021-02-08 19:10 ` Luck, Tony
2021-02-08 19:19 ` Borislav Petkov
2021-02-08 15:25 ` [PATCH 03/49] perf/x86/intel: Hybrid PMU support for perf capabilities kan.liang
2021-02-08 15:25 ` [PATCH 04/49] perf/x86: Hybrid PMU support for intel_ctrl kan.liang
2021-02-08 15:25 ` [PATCH 05/49] perf/x86: Hybrid PMU support for counters kan.liang
2021-02-08 15:25 ` [PATCH 06/49] perf/x86: Hybrid PMU support for unconstrained kan.liang
2021-02-08 15:25 ` [PATCH 07/49] perf/x86: Hybrid PMU support for hardware cache event kan.liang
2021-02-08 15:25 ` [PATCH 08/49] perf/x86: Hybrid PMU support for event constraints kan.liang
2021-02-08 15:25 ` [PATCH 09/49] perf/x86: Hybrid PMU support for extra_regs kan.liang
2021-02-08 15:25 ` [PATCH 10/49] perf/x86/intel: Factor out intel_pmu_check_num_counters kan.liang
2021-02-08 15:25 ` [PATCH 11/49] perf/x86/intel: Factor out intel_pmu_check_event_constraints kan.liang
2021-02-08 15:25 ` [PATCH 12/49] perf/x86/intel: Factor out intel_pmu_check_extra_regs kan.liang
2021-02-08 15:25 ` [PATCH 13/49] perf/x86: Expose check_hw_exists kan.liang
2021-02-08 15:25 ` [PATCH 14/49] perf/x86: Remove temporary pmu assignment in event_init kan.liang
2021-02-08 15:25 ` [PATCH 15/49] perf/x86: Factor out x86_pmu_show_pmu_cap kan.liang
2021-02-08 15:25 ` [PATCH 16/49] perf/x86: Register hybrid PMUs kan.liang
2021-02-08 15:25 ` [PATCH 17/49] perf/x86: Add structures for the attributes of Hybrid PMUs kan.liang
2021-02-08 15:25 ` [PATCH 18/49] perf/x86/intel: Add attr_update for " kan.liang
2021-02-08 15:25 ` [PATCH 19/49] perf/x86: Support filter_match callback kan.liang
2021-02-08 15:25 ` [PATCH 20/49] perf/x86/intel: Add Alder Lake Hybrid support kan.liang
2021-02-08 15:25 ` [PATCH 21/49] perf: Introduce PERF_TYPE_HARDWARE_PMU and PERF_TYPE_HW_CACHE_PMU kan.liang
2021-02-08 15:25 ` [PATCH 22/49] perf/x86/intel/uncore: Add Alder Lake support kan.liang
2021-02-09 4:18 ` kernel test robot
2021-02-08 15:25 ` [PATCH 23/49] perf/x86/msr: Add Alder Lake CPU support kan.liang
2021-02-09 3:58 ` kernel test robot
2021-02-09 13:44 ` Liang, Kan
2021-02-09 5:15 ` kernel test robot
2021-02-08 15:25 ` [PATCH 24/49] perf/x86/cstate: " kan.liang
2021-02-08 15:25 ` [PATCH 25/49] perf/x86/rapl: Add support for Intel Alder Lake kan.liang
2021-02-09 5:16 ` kernel test robot
2021-02-08 15:25 ` [PATCH 26/49] perf jevents: Support unit value "cpu_core" and "cpu_atom" kan.liang
2021-02-08 15:25 ` [PATCH 27/49] perf util: Save pmu name to struct perf_pmu_alias kan.liang
2021-02-08 18:57 ` Arnaldo Carvalho de Melo
2021-02-09 0:17 ` Jin, Yao
2021-02-08 15:25 ` [PATCH 28/49] perf pmu: Save detected hybrid pmus to a global pmu list kan.liang
2021-02-08 18:55 ` Arnaldo Carvalho de Melo
2021-02-09 0:05 ` Jin, Yao
2021-02-08 15:25 ` [PATCH 29/49] perf pmu: Add hybrid helper functions kan.liang
2021-02-08 15:25 ` [PATCH 30/49] perf list: Support --cputype option to list hybrid pmu events kan.liang
2021-02-08 15:25 ` [PATCH 31/49] perf stat: Hybrid evsel uses its own cpus kan.liang
2021-02-08 15:25 ` [PATCH 32/49] perf header: Support HYBRID_TOPOLOGY feature kan.liang
2021-02-08 19:05 ` Arnaldo Carvalho de Melo
2021-02-09 0:26 ` Jin, Yao
2021-02-08 15:25 ` [PATCH 33/49] perf header: Support hybrid CPU_PMU_CAPS kan.liang
2021-02-08 15:25 ` [PATCH 34/49] tools headers uapi: Update tools's copy of linux/perf_event.h kan.liang
2021-02-08 15:25 ` [PATCH 35/49] perf parse-events: Create two hybrid hardware events kan.liang
2021-02-08 18:59 ` Arnaldo Carvalho de Melo [this message]
2021-02-09 0:23 ` Jin, Yao
2021-02-08 15:25 ` [PATCH 36/49] perf parse-events: Create two hybrid cache events kan.liang
2021-02-08 15:25 ` [PATCH 37/49] perf parse-events: Support hardware events inside PMU kan.liang
2021-02-08 15:25 ` [PATCH 38/49] perf list: Display pmu prefix for partially supported hybrid cache events kan.liang
2021-02-08 15:25 ` [PATCH 39/49] perf parse-events: Support hybrid raw events kan.liang
2021-02-08 19:07 ` Arnaldo Carvalho de Melo
2021-02-09 0:28 ` Jin, Yao
2021-02-08 15:25 ` [PATCH 40/49] perf stat: Support --cputype option for hybrid events kan.liang
2021-02-08 15:25 ` [PATCH 41/49] perf stat: Support metrics with " kan.liang
2021-02-08 15:25 ` [PATCH 42/49] perf evlist: Create two hybrid 'cycles' events by default kan.liang
2021-02-08 15:25 ` [PATCH 43/49] perf stat: Add default hybrid events kan.liang
2021-02-08 19:10 ` Arnaldo Carvalho de Melo
2021-02-09 0:36 ` Jin, Yao
2021-02-08 15:25 ` [PATCH 44/49] perf stat: Uniquify hybrid event name kan.liang
2021-02-08 15:25 ` [PATCH 45/49] perf stat: Merge event counts from all hybrid PMUs kan.liang
2021-02-08 15:25 ` [PATCH 46/49] perf stat: Filter out unmatched aggregation for hybrid event kan.liang
2021-02-08 19:16 ` Arnaldo Carvalho de Melo
2021-02-09 0:53 ` Jin, Yao
2021-02-08 15:25 ` [PATCH 47/49] perf evlist: Warn as events from different hybrid PMUs in a group kan.liang
2021-02-08 15:25 ` [PATCH 48/49] perf Documentation: Document intel-hybrid support kan.liang
2021-02-08 15:25 ` [PATCH 49/49] perf evsel: Adjust hybrid event and global event mixed group kan.liang
2021-02-08 19:12 ` Arnaldo Carvalho de Melo
2021-02-09 0:47 ` Jin, Yao
2021-02-11 11:40 ` [PATCH 00/49] Add Alder Lake support for perf Jiri Olsa
2021-02-11 16:22 ` Liang, Kan
2021-02-18 0:07 ` Jin, Yao
2021-03-04 15:50 ` Liang, Kan
2021-03-04 17:50 ` Peter Zijlstra
2021-03-05 11:14 ` Peter Zijlstra
2021-03-05 13:36 ` Liang, Kan
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