From: Lucas Tanure <tanureal@opensource.cirrus.com>
To: Mark Brown <broonie@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Sanjay R Mehta <sanju.mehta@amd.com>,
Nehal Bakulchandra Shah <Nehal-Bakulchandra.shah@amd.com>
Cc: <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>,
<patches@opensource.cirrus.com>,
Lucas Tanure <tanureal@opensource.cirrus.com>
Subject: [PATCH 3/9] regmap: spi: SPI_CONTROLLER_CS_PER_TRANSFER affects max read/write
Date: Tue, 24 Aug 2021 11:40:35 +0100 [thread overview]
Message-ID: <20210824104041.708945-4-tanureal@opensource.cirrus.com> (raw)
In-Reply-To: <20210824104041.708945-1-tanureal@opensource.cirrus.com>
regmap-spi will split data and address between two transfers in the
same message so use addr_affects_max_raw_rw to flag that the number
bytes to read or write should be a little less (address + padding size),
so that the SPI controller can merge the entire message into a single
CS period
Signed-off-by: Lucas Tanure <tanureal@opensource.cirrus.com>
---
drivers/base/regmap/regmap-spi.c | 14 ++++++++++++--
drivers/base/regmap/regmap.c | 9 +++++++++
include/linux/regmap.h | 2 ++
3 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/base/regmap/regmap-spi.c b/drivers/base/regmap/regmap-spi.c
index 603a4c1c2066..0c1f2e51c0c7 100644
--- a/drivers/base/regmap/regmap-spi.c
+++ b/drivers/base/regmap/regmap-spi.c
@@ -115,12 +115,22 @@ static const struct regmap_bus *regmap_get_spi_bus(struct spi_device *spi,
struct spi_master *master = spi->master;
struct regmap_bus *bus = NULL;
- if (master->max_transfer_size) {
+ if (master->max_transfer_size || (master->flags & SPI_CONTROLLER_CS_PER_TRANSFER)) {
bus = kmemdup(®map_spi, sizeof(*bus), GFP_KERNEL);
if (!bus)
return ERR_PTR(-ENOMEM);
bus->free_on_exit = true;
- bus->max_raw_read = bus->max_raw_write = master->max_transfer_size(spi);
+
+ /* regmap-spi will split data and address between two transfers in the same message
+ * so use addr_affects_max_raw_rw to flag that the number bytes to read or write
+ * should be a little less (address + padding size), so the controller can
+ * fit both transfers in a single CS period
+ */
+ bus->addr_affects_max_raw_rw = master->flags & SPI_CONTROLLER_CS_PER_TRANSFER;
+
+ if (master->max_transfer_size)
+ bus->max_raw_read = bus->max_raw_write = master->max_transfer_size(spi);
+
return bus;
}
diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c
index 6ad41d0720ba..31d0949b6c2f 100644
--- a/drivers/base/regmap/regmap.c
+++ b/drivers/base/regmap/regmap.c
@@ -815,6 +815,15 @@ struct regmap *__regmap_init(struct device *dev,
if (bus) {
map->max_raw_read = bus->max_raw_read;
map->max_raw_write = bus->max_raw_write;
+ if (bus->addr_affects_max_raw_rw) {
+ if (map->max_raw_read < map->format.buf_size ||
+ map->max_raw_write < map->format.buf_size) {
+ ret = -EINVAL;
+ goto err_name;
+ }
+ map->max_raw_read -= (map->format.reg_bytes + map->format.pad_bytes);
+ map->max_raw_write -= (map->format.reg_bytes + map->format.pad_bytes);
+ }
}
map->dev = dev;
map->bus = bus;
diff --git a/include/linux/regmap.h b/include/linux/regmap.h
index 77755196277c..a90d1e270b1f 100644
--- a/include/linux/regmap.h
+++ b/include/linux/regmap.h
@@ -504,6 +504,7 @@ typedef void (*regmap_hw_free_context)(void *context);
* @max_raw_read: Max raw read size that can be used on the bus.
* @max_raw_write: Max raw write size that can be used on the bus.
* @free_on_exit: kfree this on exit of regmap
+ * @addr_affects_max_raw_rw: max_raw_[read|write] must include the address and padding preamble
*/
struct regmap_bus {
bool fast_io;
@@ -522,6 +523,7 @@ struct regmap_bus {
size_t max_raw_read;
size_t max_raw_write;
bool free_on_exit;
+ bool addr_affects_max_raw_rw;
};
/*
--
2.33.0
next prev parent reply other threads:[~2021-08-24 10:41 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-24 10:40 [PATCH 0/9] Improve support for AMD SPI controllers Lucas Tanure
2021-08-24 10:40 ` [PATCH 1/9] regmap: spi: Set regmap max raw r/w from max_transfer_size Lucas Tanure
2021-08-24 16:42 ` Mark Brown
2021-08-24 10:40 ` [PATCH 2/9] spi: core: Add flag for controllers that can't hold cs between transfers Lucas Tanure
2021-08-24 16:38 ` Mark Brown
2021-08-24 10:40 ` Lucas Tanure [this message]
2021-08-24 16:37 ` [PATCH 3/9] regmap: spi: SPI_CONTROLLER_CS_PER_TRANSFER affects max read/write Mark Brown
2021-08-25 17:13 ` Lucas tanure
2021-08-25 17:21 ` Mark Brown
2021-08-24 10:40 ` [PATCH 4/9] spi: amd: Refactor code to use less spi_master_get_devdata Lucas Tanure
2021-08-24 10:40 ` [PATCH 5/9] spi: amd: Refactor amd_spi_busy_wait to use readl_poll_timeout Lucas Tanure
2021-08-24 16:46 ` Mark Brown
2021-08-24 10:40 ` [PATCH 6/9] spi: amd: Remove uneeded variable Lucas Tanure
2021-08-24 10:40 ` [PATCH 7/9] spi: amd: Check for idle bus before execute opcode Lucas Tanure
2021-08-24 16:49 ` Mark Brown
2021-08-24 10:40 ` [PATCH 8/9] spi: amd: Refactor to overcome 70 bytes per CS limitation Lucas Tanure
2021-08-24 17:16 ` Mark Brown
2021-08-24 17:18 ` Mark Brown
2021-08-24 10:40 ` [PATCH 9/9] spi: amd: Add support for latest platform Lucas Tanure
2021-08-24 15:44 ` kernel test robot
2021-08-24 17:19 ` Mark Brown
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