From: Lucas Tanure <tanureal@opensource.cirrus.com>
To: Mark Brown <broonie@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Sanjay R Mehta <sanju.mehta@amd.com>,
Nehal Bakulchandra Shah <Nehal-Bakulchandra.shah@amd.com>
Cc: <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>,
<patches@opensource.cirrus.com>,
Lucas Tanure <tanureal@opensource.cirrus.com>
Subject: [PATCH 7/9] spi: amd: Check for idle bus before execute opcode
Date: Tue, 24 Aug 2021 11:40:39 +0100 [thread overview]
Message-ID: <20210824104041.708945-8-tanureal@opensource.cirrus.com> (raw)
In-Reply-To: <20210824104041.708945-1-tanureal@opensource.cirrus.com>
Check if the bus is not in use before starting the transfer
Also wait after so the READ bytes in the FIFO are ready to
be copied
Signed-off-by: Lucas Tanure <tanureal@opensource.cirrus.com>
---
drivers/spi/spi-amd.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-amd.c b/drivers/spi/spi-amd.c
index ebbc64a9fa7b..75390fcb0481 100644
--- a/drivers/spi/spi-amd.c
+++ b/drivers/spi/spi-amd.c
@@ -110,11 +110,17 @@ static int amd_spi_busy_wait(struct amd_spi *amd_spi)
!(val & AMD_SPI_BUSY), 10, 100000);
}
-static void amd_spi_execute_opcode(struct amd_spi *amd_spi)
+static int amd_spi_execute_opcode(struct amd_spi *amd_spi)
{
+ int ret = amd_spi_busy_wait(amd_spi);
+
+ if (ret)
+ return ret;
+
/* Set ExecuteOpCode bit in the CTRL0 register */
amd_spi_setclear_reg32(amd_spi, AMD_SPI_CTRL0_REG, AMD_SPI_EXEC_CMD, AMD_SPI_EXEC_CMD);
- amd_spi_busy_wait(amd_spi);
+
+ return amd_spi_busy_wait(amd_spi);
}
static int amd_spi_master_setup(struct spi_device *spi)
--
2.33.0
next prev parent reply other threads:[~2021-08-24 10:41 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-24 10:40 [PATCH 0/9] Improve support for AMD SPI controllers Lucas Tanure
2021-08-24 10:40 ` [PATCH 1/9] regmap: spi: Set regmap max raw r/w from max_transfer_size Lucas Tanure
2021-08-24 16:42 ` Mark Brown
2021-08-24 10:40 ` [PATCH 2/9] spi: core: Add flag for controllers that can't hold cs between transfers Lucas Tanure
2021-08-24 16:38 ` Mark Brown
2021-08-24 10:40 ` [PATCH 3/9] regmap: spi: SPI_CONTROLLER_CS_PER_TRANSFER affects max read/write Lucas Tanure
2021-08-24 16:37 ` Mark Brown
2021-08-25 17:13 ` Lucas tanure
2021-08-25 17:21 ` Mark Brown
2021-08-24 10:40 ` [PATCH 4/9] spi: amd: Refactor code to use less spi_master_get_devdata Lucas Tanure
2021-08-24 10:40 ` [PATCH 5/9] spi: amd: Refactor amd_spi_busy_wait to use readl_poll_timeout Lucas Tanure
2021-08-24 16:46 ` Mark Brown
2021-08-24 10:40 ` [PATCH 6/9] spi: amd: Remove uneeded variable Lucas Tanure
2021-08-24 10:40 ` Lucas Tanure [this message]
2021-08-24 16:49 ` [PATCH 7/9] spi: amd: Check for idle bus before execute opcode Mark Brown
2021-08-24 10:40 ` [PATCH 8/9] spi: amd: Refactor to overcome 70 bytes per CS limitation Lucas Tanure
2021-08-24 17:16 ` Mark Brown
2021-08-24 17:18 ` Mark Brown
2021-08-24 10:40 ` [PATCH 9/9] spi: amd: Add support for latest platform Lucas Tanure
2021-08-24 15:44 ` kernel test robot
2021-08-24 17:19 ` Mark Brown
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