From: James Clark <james.clark@arm.com>
To: suzuki.poulose@arm.com, mathieu.poirier@linaro.org,
coresight@lists.linaro.org
Cc: leo.yan@linaro.com, mike.leach@linaro.org,
James Clark <james.clark@arm.com>, Leo Yan <leo.yan@linaro.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 0/1] coresight: no-op refactor to make INSTP0 check more idiomatic
Date: Thu, 3 Feb 2022 11:53:34 +0000 [thread overview]
Message-ID: <20220203115336.119735-1-james.clark@arm.com> (raw)
In preparation for the bigger register refactor, simplify one of the
accesses otherwise it looked even more obfuscated after the refactor.
This can't be included in the main set because it causes a small change
in the binary, although functionally this refactor is also a no-op.
Applies to coresight/next 30d1f1c71b
James Clark (1):
coresight: no-op refactor to make INSTP0 check more idiomatic
drivers/hwtracing/coresight/coresight-etm4x-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--
2.28.0
next reply other threads:[~2022-02-03 11:54 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-03 11:53 James Clark [this message]
2022-02-03 11:53 ` [PATCH 1/1] " James Clark
2022-02-03 12:10 ` Suzuki K Poulose
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