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From: Yang Weijiang <weijiang.yang@intel.com>
To: pbonzini@redhat.com, seanjc@google.com, kvm@vger.kernel.org
Cc: like.xu.linux@gmail.com, kan.liang@linux.intel.com,
	wei.w.wang@intel.com, linux-kernel@vger.kernel.org
Subject: [PATCH 02/15] KVM: x86: Report XSS as an MSR to be saved if there are supported features
Date: Wed, 31 Aug 2022 18:34:25 -0400	[thread overview]
Message-ID: <20220831223438.413090-3-weijiang.yang@intel.com> (raw)
In-Reply-To: <20220831223438.413090-1-weijiang.yang@intel.com>

From: Sean Christopherson <sean.j.christopherson@intel.com>

Add MSR_IA32_XSS to the list of MSRs reported to userspace if
supported_xss is non-zero, i.e. KVM supports at least one XSS based
feature.

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Message-Id: <20220517154100.29983-4-weijiang.yang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 arch/x86/kvm/x86.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index d7374d768296..17663cade3fa 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1451,6 +1451,7 @@ static const u32 msrs_to_save_all[] = {
 	MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
 	MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
 	MSR_IA32_XFD, MSR_IA32_XFD_ERR,
+	MSR_IA32_XSS,
 };
 
 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
@@ -6941,6 +6942,10 @@ static void kvm_init_msr_list(void)
 			if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
 				continue;
 			break;
+		case MSR_IA32_XSS:
+			if (!kvm_caps.supported_xss)
+				continue;
+			break;
 		default:
 			break;
 		}
-- 
2.27.0


  parent reply	other threads:[~2022-09-01  1:37 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-31 22:34 [PATCH 00/15] Introduce Architectural LBR for vPMU Yang Weijiang
2022-08-31 22:34 ` [PATCH 01/15] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers Yang Weijiang
2022-09-01 14:19   ` Sean Christopherson
2022-09-02  3:05     ` Yang, Weijiang
2022-08-31 22:34 ` Yang Weijiang [this message]
2022-08-31 22:34 ` [PATCH 03/15] KVM: x86: Refresh CPUID on writes to MSR_IA32_XSS Yang Weijiang
2022-08-31 22:34 ` [PATCH 04/15] KVM: PMU: disable LBR handling if architectural LBR is available Yang Weijiang
2022-08-31 22:34 ` [PATCH 05/15] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_DEPTH for guest Arch LBR Yang Weijiang
2022-08-31 22:34 ` [PATCH 06/15] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_CTL " Yang Weijiang
2022-08-31 22:34 ` [PATCH 07/15] KVM: VMX: Support passthrough of architectural LBRs Yang Weijiang
2022-09-01 14:20   ` Sean Christopherson
2022-09-02  3:04     ` Yang, Weijiang
2022-08-31 22:34 ` [PATCH 08/15] KVM: x86: Add Arch LBR MSRs to msrs_to_save_all list Yang Weijiang
2022-08-31 22:34 ` [PATCH 09/15] KVM: x86: Refine the matching and clearing logic for supported_xss Yang Weijiang
2022-08-31 22:34 ` [PATCH 10/15] KVM: x86/vmx: Check Arch LBR config when return perf capabilities Yang Weijiang
2022-08-31 22:34 ` [PATCH 11/15] KVM: x86: Add XSAVE Support for Architectural LBR Yang Weijiang
2022-08-31 22:34 ` [PATCH 12/15] KVM: x86/vmx: Clear Arch LBREn bit before inject #DB to guest Yang Weijiang
2022-08-31 22:34 ` [PATCH 13/15] KVM: x86/vmx: Flip Arch LBREn bit on guest state change Yang Weijiang
2022-08-31 22:34 ` [PATCH 14/15] KVM: x86: Add Arch LBR data MSR access interface Yang Weijiang
2022-08-31 22:34 ` [PATCH 15/15] KVM: x86/cpuid: Advertise Arch LBR feature in CPUID Yang Weijiang
2022-09-01 14:23 ` [PATCH 00/15] Introduce Architectural LBR for vPMU Sean Christopherson
2022-09-02  3:44   ` Yang, Weijiang
2022-10-21  2:14     ` Yang, Weijiang
2022-10-30  6:06       ` Yang, Weijiang

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